From patchwork Fri Jul 15 01:30:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 9230981 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5535860574 for ; Fri, 15 Jul 2016 01:31:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 393B628329 for ; Fri, 15 Jul 2016 01:31:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B1522832C; Fri, 15 Jul 2016 01:31:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9814428329 for ; Fri, 15 Jul 2016 01:31:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751448AbcGOBbc (ORCPT ); Thu, 14 Jul 2016 21:31:32 -0400 Received: from mail-pa0-f46.google.com ([209.85.220.46]:35777 "EHLO mail-pa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751279AbcGOBbc (ORCPT ); Thu, 14 Jul 2016 21:31:32 -0400 Received: by mail-pa0-f46.google.com with SMTP id dx3so34001890pab.2 for ; Thu, 14 Jul 2016 18:31:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=SWwFlKefmbFWvdHMVeA8Sk4yFOdhrcux833ksqcO9GI=; b=Tr5V5NEuzS4gYHWIGqYHsmieBFC1UJfmad4gVZHyW2ecEzgmfTr2TXyu4OK6OcPbIs YIlSyBV8v3qzfFDKHKCEQOFHtaeqUU4QLCwcwxyY6AxZK3KJhE1B28xnn4Oc5gbyEQhD WUpmZxWCLmKEj3dgddGGxJy5rOyUca0sSKZwU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=SWwFlKefmbFWvdHMVeA8Sk4yFOdhrcux833ksqcO9GI=; b=QPxOU4FP8r1NaAeJMA74zTbkqgydSV1EfyWb+2a+R17Np8VvNBJPoaMKVdHJMJnrUR qc/DUhvKE5l25pnAP3nqz2XSbcWIqLma8g29a7KyYdlc/Uit2d/WOouBnLDPIqsM6EXc h8O/F34cDlKQIPVUbiX9pvjVGYQaz0nqgKW/iTRFZAv8nR0H8HFSSTi5LcMZ98T3i4vU AwntfKG9BeRPWb4XkMuEXSxr7DzuFQXjubeN/em/xEr1/OP0eDRxWh++LlP8NtscMW2k JmWqgRcG78q9M9k8jjMLpXAhV3snAOpqJ2T22gYCM2TABY+r8Xof+7CwynLMUZ5zqoAb gbQA== X-Gm-Message-State: ALyK8tIsJYexIejvelsqoAzquX8AA6sfUNhsugJlJjAJ2DJYxTsdgMqnPXBguWCKgiI4XjjN X-Received: by 10.66.139.230 with SMTP id rb6mr27894588pab.101.1468546291362; Thu, 14 Jul 2016 18:31:31 -0700 (PDT) Received: from ban.mtv.corp.google.com ([172.22.64.120]) by smtp.gmail.com with ESMTPSA id o6sm7479865pab.11.2016.07.14.18.31.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 14 Jul 2016 18:31:30 -0700 (PDT) From: Brian Norris To: Mark Brown , Heiko Stuebner Cc: Brian Norris , linux-spi@vger.kernel.org, Caesar Wang , Brian Norris , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Eddie Cai , Shawn Lin , Tomeu Vizoso Subject: [PATCH] spi: rockchip: limit transfers to (64K - 1) bytes Date: Thu, 14 Jul 2016 18:30:59 -0700 Message-Id: <1468546259-136659-1-git-send-email-briannorris@chromium.org> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Rockchip SPI controller's length register only supports 16-bits, yielding a maximum length of 64KiB (the CTRLR1 register holds "length - 1"). Trying to transfer more than that (e.g., with a large SPI flash read) will cause the driver to hang. Now, it seems that while theoretically we should be able to program CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to cause the core to choke, so stick with a maximum of 64K - 1 bytes -- i.e., 0xffff. Signed-off-by: Brian Norris --- drivers/spi/spi-rockchip.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index d840324bcc9f..0f89c2169c24 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -142,6 +142,12 @@ /* sclk_out: spi master internal logic in rk3x can support 50Mhz */ #define MAX_SCLK_OUT 50000000 +/* + * SPI_CTRLR1 is 16-bits, so we should support lengths of 0xffff + 1. However, + * the controller seems to hang when given 0x10000, so stick with this for now. + */ +#define ROCKCHIP_SPI_MAX_TRANLEN 0xffff + enum rockchip_ssi_type { SSI_MOTO_SPI = 0, SSI_TI_SSP, @@ -573,6 +579,11 @@ static void rockchip_spi_config(struct rockchip_spi *rs) dev_dbg(rs->dev, "cr0 0x%x, div %d\n", cr0, div); } +static size_t rockchip_spi_max_transfer_size(struct spi_device *spi) +{ + return ROCKCHIP_SPI_MAX_TRANLEN; +} + static int rockchip_spi_transfer_one( struct spi_master *master, struct spi_device *spi, @@ -589,6 +600,11 @@ static int rockchip_spi_transfer_one( return -EINVAL; } + if (xfer->len > ROCKCHIP_SPI_MAX_TRANLEN) { + dev_err(rs->dev, "Transfer is too long (%d)\n", xfer->len); + return -EINVAL; + } + rs->speed = xfer->speed_hz; rs->bpw = xfer->bits_per_word; rs->n_bytes = rs->bpw >> 3; @@ -730,6 +746,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) master->prepare_message = rockchip_spi_prepare_message; master->unprepare_message = rockchip_spi_unprepare_message; master->transfer_one = rockchip_spi_transfer_one; + master->max_transfer_size = rockchip_spi_max_transfer_size; master->handle_err = rockchip_spi_handle_err; rs->dma_tx.ch = dma_request_chan(rs->dev, "tx");