From patchwork Fri Nov 4 05:06:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Holdsworth X-Patchwork-Id: 9411907 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C8C2E60722 for ; Fri, 4 Nov 2016 05:07:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B73422B076 for ; Fri, 4 Nov 2016 05:07:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AC29A2B087; Fri, 4 Nov 2016 05:07:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 68B692B076 for ; Fri, 4 Nov 2016 05:07:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759682AbcKDFH3 (ORCPT ); Fri, 4 Nov 2016 01:07:29 -0400 Received: from auth.a.painless.aa.net.uk ([90.155.4.51]:52542 "EHLO auth.a.painless.aa.net.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759679AbcKDFH1 (ORCPT ); Fri, 4 Nov 2016 01:07:27 -0400 Received: from 71-211-133-147.hlrn.qwest.net ([71.211.133.147] helo=mesh-desktop.Home) by a.painless.aa.net.uk with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.77) (envelope-from ) id 1c2Wio-0004x5-NP; Fri, 04 Nov 2016 05:07:24 +0000 From: Joel Holdsworth To: atull@opensource.altera.com, moritz.fischer@ettus.com, geert@linux-m68k.org, robh@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, marex@denk.de Cc: Joel Holdsworth Subject: [PATCH v7 2/3] Documentation: Add binding document for Lattice iCE40 FPGA manager Date: Thu, 3 Nov 2016 23:06:43 -0600 Message-Id: <1478236004-7852-2-git-send-email-joel@airwebreathe.org.uk> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478236004-7852-1-git-send-email-joel@airwebreathe.org.uk> References: <1478236004-7852-1-git-send-email-joel@airwebreathe.org.uk> X-Painless-Spam-Score: -0.2 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP --- .../bindings/fpga/lattice-ice40-fpga-mgr.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt diff --git a/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt new file mode 100644 index 0000000..cb64184 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt @@ -0,0 +1,21 @@ +Lattice iCE40 FPGA Manager + +Required properties: +- compatible: Should contain "lattice,ice40-fpga-mgr" +- reg: SPI chip select +- spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000) +- cdone-gpios: GPIO input connected to CDONE pin +- reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note + that unless the GPIO is held low during startup, the + FPGA will enter Master SPI mode and drive SCK with a + clock signal, potentially jamming other devices on the + bus until the firmware is loaded. + +Example: + ice40: ice40@0 { + compatible = "lattice,ice40-fpga-mgr"; + reg = <0>; + spi-max-frequency = <1000000>; + cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; + creset_b-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + };