From patchwork Wed Feb 8 16:53:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamal Dasu X-Patchwork-Id: 9562833 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D9B83601E5 for ; Wed, 8 Feb 2017 17:04:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE0D3284FA for ; Wed, 8 Feb 2017 17:04:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9F888284EF; Wed, 8 Feb 2017 17:04:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 201D5284EF for ; Wed, 8 Feb 2017 17:04:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932452AbdBHRE6 (ORCPT ); Wed, 8 Feb 2017 12:04:58 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:34234 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932436AbdBHRE4 (ORCPT ); Wed, 8 Feb 2017 12:04:56 -0500 Received: by mail-pg0-f66.google.com with SMTP id v184so15657511pgv.1 for ; Wed, 08 Feb 2017 09:04:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7lsW8m9Mom62Juse+j3TtGpEapxLCjxfVy/IF7/gRBU=; b=fnJQgvH9+DXaGk+jFBqrL6VabFfWvy8WVgyqPJFtTxTXYVfI+QG9enMzoBfxsmxoUA qeS0DsVDlb2keiCe1dnliEAKrnBd0Bk/BMdwsdZFtnkpG4kPNqgRFpVUbs51ajbf39e/ vw2ZrgeFxTnzN3HmvVp/nqr1lBn6FdtqKvKWjI7znUKBFWMIdSMXjVBGJEbOlaXB2/g0 o+jHr1VI/uUpjGcPBxYkaiKUEhp9CFw/wg3Ec/2jBZjU5m7r3a42bMfsvvQSjDGkyCXR K0leJswBMNqkGQQIaNR6Nt+DjyyHqpeirDwG57F7/XrKSMncYWR8pssKf4NT7ehj7U5S n6XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7lsW8m9Mom62Juse+j3TtGpEapxLCjxfVy/IF7/gRBU=; b=nmI2QwtMYpD+nSV2Ssl6afcNgoO5JBbIIOFY3N03ITdC3yvgfw62xQbIzWyTTvhOtj hh0EMblU2gMxxbJuf+vQ2m8XSEv8XRb0/+0ZZK2gQOWONSYsIJ3GrE3wUrNhoh/hGTKk A+rb5xu1hiYtiZYMuuRdH6XK8Ig9eo0fOu9mQwLnobfkm2RyoG8WoaEGS69Fk3XTtbYx Tt6SIf6totjbgw3wReX3jRhaPZaqlgfUqQaZdU+R9NIWxntLVBWrpqrPRiyffASTp2Pb oLMqH2WfDztBV+ZorAO8hB4itlI5jIGDG40ne1Twg0gccEz/oqwR1KztzjjOokA6/KyV Rzvw== X-Gm-Message-State: AIkVDXLKn/E5gG8ZjQIN4WPyOlw0clAP3xp30HxFtF7POK6zHMfof2UmWqIpzrtLNiozAQ== X-Received: by 10.99.178.21 with SMTP id x21mr28031510pge.48.1486572971776; Wed, 08 Feb 2017 08:56:11 -0800 (PST) Received: from mail.broadcom.com ([192.19.218.250]) by smtp.gmail.com with ESMTPSA id q22sm21714703pfj.77.2017.02.08.08.56.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 08 Feb 2017 08:56:11 -0800 (PST) From: Kamal Dasu To: linux-spi@vger.kernel.org, cyrille.pitchen@atmel.com, marex@denx.de, broonie@kernel.org Cc: linux-mtd@lists.infradead.org, f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, Kamal Dasu Subject: [PATCH v2 1/2] mtd: spi-nor: Added spi-nor reset function Date: Wed, 8 Feb 2017 11:53:00 -0500 Message-Id: <1486572781-28808-2-git-send-email-kdasu.kdev@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1486572781-28808-1-git-send-email-kdasu.kdev@gmail.com> References: <1486572781-28808-1-git-send-email-kdasu.kdev@gmail.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Refactored spi_nor_scan() code to add spi_nor_reset() function that programs the nand device to: 1) remove flash protection if applicable 2) set read mode to quad mode if configured such 3) set the address width based on the flash size and vendor On pm resume spi-nor flash may need to be reconfigured after power reset, there is no need to go through a full spi_nor_scan(), flash device driver needs to call spi_nor_reset() to reprogram the flash to its probed state. Signed-off-by: Kamal Dasu --- drivers/mtd/spi-nor/spi-nor.c | 62 ++++++++++++++++++++++++++++--------------- include/linux/mtd/spi-nor.h | 21 ++++++++++++++- 2 files changed, 61 insertions(+), 22 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index da7cd69..8e3d8bd 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1312,6 +1312,41 @@ static int spi_nor_check(struct spi_nor *nor) return 0; } +int spi_nor_reset(struct spi_nor *nor) +{ + int ret = 0; + const struct flash_info *info = nor->info; + struct device *dev = nor->dev; + + /* + * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up + * with the software protection bits set + */ + + if (JEDEC_MFR(info) == SNOR_MFR_ATMEL || + JEDEC_MFR(info) == SNOR_MFR_INTEL || + JEDEC_MFR(info) == SNOR_MFR_SST || + info->flags & SPI_NOR_HAS_LOCK) { + write_enable(nor); + write_sr(nor, 0); + spi_nor_wait_till_ready(nor); + } + + if (nor->flash_read == SPI_NOR_QUAD) { + ret = set_quad_mode(nor, info); + if (ret) { + dev_err(dev, "quad mode not supported\n"); + return ret; + } + } + + if (nor->addr_width == 4 && JEDEC_MFR(info) != SNOR_MFR_SPANSION) + set_4byte(nor, info, 1); + + return ret; +} +EXPORT_SYMBOL_GPL(spi_nor_reset); + int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) { const struct flash_info *info = NULL; @@ -1357,22 +1392,9 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) } } + nor->info = info; mutex_init(&nor->lock); - /* - * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up - * with the software protection bits set - */ - - if (JEDEC_MFR(info) == SNOR_MFR_ATMEL || - JEDEC_MFR(info) == SNOR_MFR_INTEL || - JEDEC_MFR(info) == SNOR_MFR_SST || - info->flags & SPI_NOR_HAS_LOCK) { - write_enable(nor); - write_sr(nor, 0); - spi_nor_wait_till_ready(nor); - } - if (!mtd->name) mtd->name = dev_name(dev); mtd->priv = nor; @@ -1447,11 +1469,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) /* Quad/Dual-read mode takes precedence over fast/normal */ if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { - ret = set_quad_mode(nor, info); - if (ret) { - dev_err(dev, "quad mode not supported\n"); - return ret; - } nor->flash_read = SPI_NOR_QUAD; } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { nor->flash_read = SPI_NOR_DUAL; @@ -1503,8 +1520,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) /* No small sector erase for 4-byte command set */ nor->erase_opcode = SPINOR_OP_SE_4B; mtd->erasesize = info->sector_size; - } else - set_4byte(nor, info, 1); + } } else { nor->addr_width = 3; } @@ -1517,6 +1533,10 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) nor->read_dummy = spi_nor_read_dummy_cycles(nor); + ret = spi_nor_reset(nor); + if (ret) + return ret; + dev_info(dev, "%s (%lld Kbytes)\n", info->name, (long long)mtd->size >> 10); diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index c425c7b..4733c04 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -121,6 +121,8 @@ enum spi_nor_option_flags { SNOR_F_HAS_SR_TB = BIT(1), }; +struct flash_info; + /** * struct spi_nor - Structure for defining a the SPI NOR layer * @mtd: point to a mtd_info structure @@ -154,6 +156,7 @@ enum spi_nor_option_flags { * @priv: the private data */ struct spi_nor { + const struct flash_info *info; struct mtd_info mtd; struct mutex lock; struct device *dev; @@ -198,12 +201,28 @@ static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor) } /** + * spi_nor_reset() - reset scan the SPI NOR + * @nor: the spi_nor structure + * + * The drivers uses this function to reset the SPI NOR flash device to + * its initial scanned state, it shall use all nor information set on poweron + * for the read mode, address width and enabling write mode for certain + * manufacturers. This would be needed to be called for flash devices that are + * reset during power management. + * + * The chip type name can be provided through the @name parameter. + * + * Return: 0 for success, others for failure. + */ +int spi_nor_reset(struct spi_nor *nor); + +/** * spi_nor_scan() - scan the SPI NOR * @nor: the spi_nor structure * @name: the chip type name * @mode: the read mode supported by the driver * - * The drivers can use this fuction to scan the SPI NOR. + * The drivers can use this function to scan the SPI NOR. * In the scanning, it will try to get all the necessary information to * fill the mtd_info{} and the spi_nor{}. *