From patchwork Tue Jun 27 15:45:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amelie Delaunay X-Patchwork-Id: 9812693 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1DDD3603F2 for ; Tue, 27 Jun 2017 15:47:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F10B28696 for ; Tue, 27 Jun 2017 15:47:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0365E286E4; Tue, 27 Jun 2017 15:47:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7123286DC for ; Tue, 27 Jun 2017 15:47:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751541AbdF0Pq1 (ORCPT ); Tue, 27 Jun 2017 11:46:27 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:38498 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752365AbdF0PqL (ORCPT ); Tue, 27 Jun 2017 11:46:11 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v5RFi7vo007667; Tue, 27 Jun 2017 17:45:42 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-.pphosted.com with ESMTP id 2battv0d7m-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 27 Jun 2017 17:45:42 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 68F1738; Tue, 27 Jun 2017 15:45:41 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 50E0D2571; Tue, 27 Jun 2017 15:45:41 +0000 (GMT) Received: from localhost (10.201.23.160) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.339.0; Tue, 27 Jun 2017 17:45:41 +0200 From: Amelie Delaunay To: Mark Brown , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue CC: , , , , Amelie Delaunay Subject: [PATCHv2 6/9] spi: stm32: add runtime PM support Date: Tue, 27 Jun 2017 17:45:18 +0200 Message-ID: <1498578321-13980-7-git-send-email-amelie.delaunay@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1498578321-13980-1-git-send-email-amelie.delaunay@st.com> References: <1498578321-13980-1-git-send-email-amelie.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.160] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-06-27_09:, , signatures=0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch reworks suspend and resume callbacks and add runtime_suspend and runtime_resume callbacks. Signed-off-by: Amelie Delaunay --- drivers/spi/spi-stm32.c | 43 ++++++++++++++++++++++++++++++++++++------- 1 file changed, 36 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 72efc63..209afda 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -1164,6 +1165,9 @@ static int stm32_spi_probe(struct platform_device *pdev) if (spi->dma_tx || spi->dma_rx) master->can_dma = stm32_spi_can_dma; + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + ret = devm_spi_register_master(&pdev->dev, master); if (ret) { dev_err(&pdev->dev, "spi master registration failed: %d\n", @@ -1203,6 +1207,8 @@ static int stm32_spi_probe(struct platform_device *pdev) dma_release_channel(spi->dma_tx); if (spi->dma_rx) dma_release_channel(spi->dma_rx); + + pm_runtime_disable(&pdev->dev); err_clk_disable: clk_disable_unprepare(spi->clk); err_master_put: @@ -1225,23 +1231,42 @@ static int stm32_spi_remove(struct platform_device *pdev) clk_disable_unprepare(spi->clk); + pm_runtime_disable(&pdev->dev); + return 0; } +#ifdef CONFIG_PM +static int stm32_spi_runtime_suspend(struct device *dev) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct stm32_spi *spi = spi_master_get_devdata(master); + + clk_disable_unprepare(spi->clk); + + return 0; +} + +static int stm32_spi_runtime_resume(struct device *dev) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct stm32_spi *spi = spi_master_get_devdata(master); + + return clk_prepare_enable(spi->clk); +} +#endif + #ifdef CONFIG_PM_SLEEP static int stm32_spi_suspend(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); - struct stm32_spi *spi = spi_master_get_devdata(master); int ret; ret = spi_master_suspend(master); if (ret) return ret; - clk_disable_unprepare(spi->clk); - - return ret; + return pm_runtime_force_suspend(dev); } static int stm32_spi_resume(struct device *dev) @@ -1250,9 +1275,10 @@ static int stm32_spi_resume(struct device *dev) struct stm32_spi *spi = spi_master_get_devdata(master); int ret; - ret = clk_prepare_enable(spi->clk); + ret = pm_runtime_force_resume(dev); if (ret) return ret; + ret = spi_master_resume(master); if (ret) clk_disable_unprepare(spi->clk); @@ -1261,8 +1287,11 @@ static int stm32_spi_resume(struct device *dev) } #endif -static SIMPLE_DEV_PM_OPS(stm32_spi_pm_ops, - stm32_spi_suspend, stm32_spi_resume); +static const struct dev_pm_ops stm32_spi_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(stm32_spi_suspend, stm32_spi_resume) + SET_RUNTIME_PM_OPS(stm32_spi_runtime_suspend, + stm32_spi_runtime_resume, NULL) +}; static struct platform_driver stm32_spi_driver = { .probe = stm32_spi_probe,