From patchwork Tue Jun 27 15:45:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amelie Delaunay X-Patchwork-Id: 9812671 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6A11B60351 for ; Tue, 27 Jun 2017 15:46:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6D59028179 for ; Tue, 27 Jun 2017 15:46:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5E44F28683; Tue, 27 Jun 2017 15:46:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EAE6828595 for ; Tue, 27 Jun 2017 15:46:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752523AbdF0PqT (ORCPT ); Tue, 27 Jun 2017 11:46:19 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:35290 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752392AbdF0PqM (ORCPT ); Tue, 27 Jun 2017 11:46:12 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v5RFiFHw025628; Tue, 27 Jun 2017 17:45:43 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-.pphosted.com with ESMTP id 2b9d748vqq-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 27 Jun 2017 17:45:43 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9C7EF31; Tue, 27 Jun 2017 15:45:42 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 806082572; Tue, 27 Jun 2017 15:45:42 +0000 (GMT) Received: from localhost (10.201.23.160) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.339.0; Tue, 27 Jun 2017 17:45:42 +0200 From: Amelie Delaunay To: Mark Brown , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue CC: , , , , Amelie Delaunay Subject: [PATCHv2 7/9] spi: stm32: enhance DMA error management Date: Tue, 27 Jun 2017 17:45:19 +0200 Message-ID: <1498578321-13980-8-git-send-email-amelie.delaunay@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1498578321-13980-1-git-send-email-amelie.delaunay@st.com> References: <1498578321-13980-1-git-send-email-amelie.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.160] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-06-27_09:, , signatures=0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch reworks DMA error management. In case the DMA callback is called while EOT (End Of Transfer) flag is not set, that means that DMA encountered an error. This error will result in an auto-suspend of SPI flow, which could also result in an overrun. So, in DMA mode, SUSP and OVR flags are a condition to stop the current transfer. Moreover, stm32_spi_can_dma doesn't care about the state of dma channels. During driver probe, master->can_dma is initialised if dma channel request is successful. That's why we must use master->can_dma to know if dma use is possible (dma channel are successfully requested and the transfer size is greater than fifo size). Signed-off-by: Amelie Delaunay --- drivers/spi/spi-stm32.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 209afda..fdbc648 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -514,6 +514,12 @@ static irqreturn_t stm32_spi_irq(int irq, void *dev_id) dev_warn(spi->dev, "Communication suspended\n"); if (!spi->cur_usedma && (spi->rx_buf && (spi->rx_len > 0))) stm32_spi_read_rxfifo(spi, false); + /* + * If communication is suspended while using DMA, it means + * that something went wrong, so stop the current transfer + */ + if (spi->cur_usedma) + end = true; } if (sr & SPI_SR_MODF) { @@ -525,6 +531,12 @@ static irqreturn_t stm32_spi_irq(int irq, void *dev_id) dev_warn(spi->dev, "Overrun: received value discarded\n"); if (!spi->cur_usedma && (spi->rx_buf && (spi->rx_len > 0))) stm32_spi_read_rxfifo(spi, false); + /* + * If overrun is detected while using DMA, it means that + * something went wrong, so stop the current transfer + */ + if (spi->cur_usedma) + end = true; } if (sr & SPI_SR_EOT) { @@ -645,12 +657,10 @@ static void stm32_spi_dma_cb(void *data) spin_unlock_irqrestore(&spi->lock, flags); - if (!(sr & SPI_SR_EOT)) { - dev_warn(spi->dev, "DMA callback (sr=0x%08x)\n", sr); + if (!(sr & SPI_SR_EOT)) + dev_warn(spi->dev, "DMA error (sr=0x%08x)\n", sr); - spi_finalize_current_transfer(spi->master); - stm32_spi_disable(spi); - } + /* Now wait for EOT, or SUSP or OVR in case of error */ } /** @@ -986,7 +996,8 @@ static int stm32_spi_transfer_one(struct spi_master *master, spi->tx_len = spi->tx_buf ? transfer->len : 0; spi->rx_len = spi->rx_buf ? transfer->len : 0; - spi->cur_usedma = stm32_spi_can_dma(master, spi_dev, transfer); + spi->cur_usedma = (master->can_dma && + stm32_spi_can_dma(master, spi_dev, transfer)); ret = stm32_spi_transfer_one_setup(spi, spi_dev, transfer); if (ret) {