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Thu, 4 Oct 2018 08:50:43 +0000 From: Yogesh Gaur To: linux-mtd@lists.infradead.org, boris.brezillon@bootlin.com, marek.vasut@gmail.com, vigneshr@ti.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org Cc: robh@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org, computersforpeace@gmail.com, frieder.schrempf@exceet.de, linux-kernel@vger.kernel.org, Yogesh Gaur Subject: [PATCH 4/4] arm64: dts: lx2160a: update fspi node Date: Thu, 4 Oct 2018 14:18:40 +0530 Message-Id: <1538642920-3843-5-git-send-email-yogeshnarayan.gaur@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1538642920-3843-1-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1538642920-3843-1-git-send-email-yogeshnarayan.gaur@nxp.com> MIME-Version: 1.0 X-Originating-IP: [14.143.30.134] X-ClientProxiedBy: SG2PR06CA0156.apcprd06.prod.outlook.com (2603:1096:1:1f::34) To AM2PR04MB1025.eurprd04.prod.outlook.com (2a01:111:e400:8442::11) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 460e8173-013c-43c1-2807-08d629d67a49 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(7020095)(4652040)(8989299)(4534185)(7168020)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020);SRVR:AM2PR04MB1025; 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Added flag spi-rx-bus-width and spi-tx-bus-width with values as 8 and 1 respectively for both flashes connected at CS0 and CS1. Signed-off-by: Yogesh Gaur --- arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 901ca346..817175a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -42,6 +42,8 @@ m25p,fast-read; spi-max-frequency = <20000000>; reg = <0>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; }; mt35xu512aba1: flash@1 { @@ -51,6 +53,8 @@ m25p,fast-read; spi-max-frequency = <20000000>; reg = <1>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <1>; }; };