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Mon, 15 Oct 2018 11:48:19 +0000 Received: from VI1PR04MB1038.eurprd04.prod.outlook.com ([fe80::d887:3c96:479a:4123]) by VI1PR04MB1038.eurprd04.prod.outlook.com ([fe80::d887:3c96:479a:4123%3]) with mapi id 15.20.1228.027; Mon, 15 Oct 2018 11:48:19 +0000 From: Yogesh Narayan Gaur To: "linux-mtd@lists.infradead.org" , "boris.brezillon@bootlin.com" , "marek.vasut@gmail.com" , "vigneshr@ti.com" , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" CC: "robh@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "computersforpeace@gmail.com" , "frieder.schrempf@exceet.de" , "linux-kernel@vger.kernel.org" , Yogesh Narayan Gaur Subject: [PATCH v2 4/7] mtd: m25p80: add support of octal I/O transfer Thread-Topic: [PATCH v2 4/7] mtd: m25p80: add support of octal I/O transfer Thread-Index: AQHUZHz3yd+54e3bMUCmj/xMT+gPbQ== Date: Mon, 15 Oct 2018 11:48:19 +0000 Message-ID: <1539603969-21076-5-git-send-email-yogeshnarayan.gaur@nxp.com> References: <1539603969-21076-1-git-send-email-yogeshnarayan.gaur@nxp.com> In-Reply-To: <1539603969-21076-1-git-send-email-yogeshnarayan.gaur@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SG2PR02CA0068.apcprd02.prod.outlook.com (2603:1096:4:54::32) To VI1PR04MB1038.eurprd04.prod.outlook.com (2a01:111:e400:5092::16) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yogeshnarayan.gaur@nxp.com; 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Assign hw-capability mask bits for octal transfer. Signed-off-by: Yogesh Gaur --- Changes for v2: Incorporated review comments of Boris. drivers/mtd/devices/m25p80.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index cb14cf9..e5e632c 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -175,7 +175,14 @@ static int m25p_probe(struct spi_mem *spimem) spi_mem_set_drvdata(spimem, flash); flash->spimem = spimem; - if (spi->mode & SPI_RX_QUAD) { + if (spi->mode & SPI_RX_OCTAL) { + hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8; + + if (spi->mode & SPI_TX_OCTAL) + hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 | + SNOR_HWCAPS_PP_1_1_8 | + SNOR_HWCAPS_PP_1_8_8); + } else if (spi->mode & SPI_RX_QUAD) { hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4; if (spi->mode & SPI_TX_QUAD)