From patchwork Wed Jan 8 12:55:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11323567 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 56EA11580 for ; Wed, 8 Jan 2020 12:57:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3FD062072A for ; Wed, 8 Jan 2020 12:57:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728510AbgAHM5W (ORCPT ); Wed, 8 Jan 2020 07:57:22 -0500 Received: from esa1.microchip.iphmx.com ([68.232.147.91]:15834 "EHLO esa1.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726319AbgAHM5V (ORCPT ); Wed, 8 Jan 2020 07:57:21 -0500 Received-SPF: Pass (esa1.microchip.iphmx.com: domain of Claudiu.Beznea@microchip.com designates 198.175.253.82 as permitted sender) identity=mailfrom; client-ip=198.175.253.82; receiver=esa1.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="Claudiu.Beznea@microchip.com"; x-conformance=spf_only; x-record-type="v=spf1"; x-record-text="v=spf1 mx a:ushub1.microchip.com a:smtpout.microchip.com -exists:%{i}.spf.microchip.iphmx.com include:servers.mcsv.net include:mktomail.com include:spf.protection.outlook.com ~all" Received-SPF: None (esa1.microchip.iphmx.com: no sender authenticity information available from domain of postmaster@email.microchip.com) identity=helo; client-ip=198.175.253.82; receiver=esa1.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa1.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: xmT3Mcf3S9/tnfGJssOEPLTVnYXXoRgVxPx3+ShY2n7weGIu6nc0pZCUXda3tMcbubRB+NJXNc bCzwt+Qwpblz/FlaRk+/iG+3dJDmTDBjvJ+qKQLrXlnDKh4Vrg7fpJGeC3sz+FcglG3s62oF7+ mfYMWhZ6FYMoHxxgaAOBe80QueXe3THiVu2/cAjYaCFtAbrAUduYaNKxkxQLK+vfc0/MncXAQa V8z4ObcPqTUpcw6IffcoQauISsqVhIn2mkEoa0Y18gBGpPlLOC9KhlOXHOqHx+rfVu5LurNLpi NmM= X-IronPort-AV: E=Sophos;i="5.69,410,1571727600"; d="scan'208";a="64014441" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Jan 2020 05:57:19 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 8 Jan 2020 05:57:03 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.85.251) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Wed, 8 Jan 2020 05:56:56 -0700 From: Claudiu Beznea To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , Claudiu Beznea Subject: [PATCH 08/16] dt-bindings: atmel-sysreg: add microchip,sam9x60-ddramc Date: Wed, 8 Jan 2020 14:55:15 +0200 Message-ID: <1578488123-26127-9-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578488123-26127-1-git-send-email-claudiu.beznea@microchip.com> References: <1578488123-26127-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add microchip,sam9x60-ddramc to DT bindings documentation. Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 9fbde401a090..b4900d3b4a7c 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -39,6 +39,7 @@ RAMC SDRAM/DDR Controller required properties: "atmel,at91sam9260-sdramc", "atmel,at91sam9g45-ddramc", "atmel,sama5d3-ddramc", + "microchip,sam9x60-ddramc" - reg: Should contain registers location and length Examples: