Message ID | 1590049764-20912-7-git-send-email-akashast@codeaurora.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | Add interconnect support to QSPI and QUP drivers | expand |
Hi Akash, Thank you for the patch! Yet something to improve: [auto build test ERROR on tty/tty-testing] [also build test ERROR on spi/for-next wsa/i2c/for-next usb/usb-testing driver-core/driver-core-testing linus/master v5.7-rc6] [cannot apply to next-20200522] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Akash-Asthana/Add-interconnect-support-to-QSPI-and-QUP-drivers/20200521-163523 base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tty-testing config: arm64-randconfig-r026-20200521 (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 3393cc4cebf9969db94dc424b7a2b6195589c33b) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp@intel.com> All error/warnings (new ones prefixed by >>, old ones prefixed by <<): >> drivers/spi/spi-qcom-qspi.c:479:31: error: implicit declaration of function 'devm_of_icc_get' [-Werror,-Wimplicit-function-declaration] ctrl->icc_path_cpu_to_qspi = devm_of_icc_get(dev, "qspi-config"); ^ >> drivers/spi/spi-qcom-qspi.c:479:29: warning: incompatible integer to pointer conversion assigning to 'struct icc_path *' from 'int' [-Wint-conversion] ctrl->icc_path_cpu_to_qspi = devm_of_icc_get(dev, "qspi-config"); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/spi/spi-qcom-qspi.c:495:8: error: implicit declaration of function 'icc_disable' [-Werror,-Wimplicit-function-declaration] ret = icc_disable(ctrl->icc_path_cpu_to_qspi); ^ drivers/spi/spi-qcom-qspi.c:495:8: note: did you mean 'clk_disable'? include/linux/clk.h:519:6: note: 'clk_disable' declared here void clk_disable(struct clk *clk); ^ drivers/spi/spi-qcom-qspi.c:559:8: error: implicit declaration of function 'icc_disable' [-Werror,-Wimplicit-function-declaration] ret = icc_disable(ctrl->icc_path_cpu_to_qspi); ^ >> drivers/spi/spi-qcom-qspi.c:575:8: error: implicit declaration of function 'icc_enable' [-Werror,-Wimplicit-function-declaration] ret = icc_enable(ctrl->icc_path_cpu_to_qspi); ^ drivers/spi/spi-qcom-qspi.c:575:8: note: did you mean 'clk_enable'? include/linux/clk.h:491:5: note: 'clk_enable' declared here int clk_enable(struct clk *clk); ^ 1 warning and 4 errors generated. vim +/devm_of_icc_get +479 drivers/spi/spi-qcom-qspi.c 440 441 static int qcom_qspi_probe(struct platform_device *pdev) 442 { 443 int ret; 444 struct device *dev; 445 struct spi_master *master; 446 struct qcom_qspi *ctrl; 447 448 dev = &pdev->dev; 449 450 master = spi_alloc_master(dev, sizeof(*ctrl)); 451 if (!master) 452 return -ENOMEM; 453 454 platform_set_drvdata(pdev, master); 455 456 ctrl = spi_master_get_devdata(master); 457 458 spin_lock_init(&ctrl->lock); 459 ctrl->dev = dev; 460 ctrl->base = devm_platform_ioremap_resource(pdev, 0); 461 if (IS_ERR(ctrl->base)) { 462 ret = PTR_ERR(ctrl->base); 463 goto exit_probe_master_put; 464 } 465 466 ctrl->clks = devm_kcalloc(dev, QSPI_NUM_CLKS, 467 sizeof(*ctrl->clks), GFP_KERNEL); 468 if (!ctrl->clks) { 469 ret = -ENOMEM; 470 goto exit_probe_master_put; 471 } 472 473 ctrl->clks[QSPI_CLK_CORE].id = "core"; 474 ctrl->clks[QSPI_CLK_IFACE].id = "iface"; 475 ret = devm_clk_bulk_get(dev, QSPI_NUM_CLKS, ctrl->clks); 476 if (ret) 477 goto exit_probe_master_put; 478 > 479 ctrl->icc_path_cpu_to_qspi = devm_of_icc_get(dev, "qspi-config"); 480 if (IS_ERR(ctrl->icc_path_cpu_to_qspi)) { 481 ret = PTR_ERR(ctrl->icc_path_cpu_to_qspi); 482 if (ret != -EPROBE_DEFER) 483 dev_err(dev, "Failed to get cpu path :%d\n", ret); 484 goto exit_probe_master_put; 485 } 486 /* Set BW vote for register access */ 487 ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, Bps_to_icc(1000), 488 Bps_to_icc(1000)); 489 if (ret) { 490 dev_err(ctrl->dev, "%s: ICC BW voting failed for cpu :%d\n", 491 __func__, ret); 492 goto exit_probe_master_put; 493 } 494 > 495 ret = icc_disable(ctrl->icc_path_cpu_to_qspi); 496 if (ret) { 497 dev_err(ctrl->dev, "%s: ICC disable failed for cpu :%d\n", 498 __func__, ret); 499 goto exit_probe_master_put; 500 } 501 502 ret = platform_get_irq(pdev, 0); 503 if (ret < 0) 504 goto exit_probe_master_put; 505 ret = devm_request_irq(dev, ret, qcom_qspi_irq, 506 IRQF_TRIGGER_HIGH, dev_name(dev), ctrl); 507 if (ret) { 508 dev_err(dev, "Failed to request irq %d\n", ret); 509 goto exit_probe_master_put; 510 } 511 512 master->max_speed_hz = 300000000; 513 master->num_chipselect = QSPI_NUM_CS; 514 master->bus_num = -1; 515 master->dev.of_node = pdev->dev.of_node; 516 master->mode_bits = SPI_MODE_0 | 517 SPI_TX_DUAL | SPI_RX_DUAL | 518 SPI_TX_QUAD | SPI_RX_QUAD; 519 master->flags = SPI_MASTER_HALF_DUPLEX; 520 master->prepare_message = qcom_qspi_prepare_message; 521 master->transfer_one = qcom_qspi_transfer_one; 522 master->handle_err = qcom_qspi_handle_err; 523 master->auto_runtime_pm = true; 524 525 pm_runtime_enable(dev); 526 527 ret = spi_register_master(master); 528 if (!ret) 529 return 0; 530 531 pm_runtime_disable(dev); 532 533 exit_probe_master_put: 534 spi_master_put(master); 535 536 return ret; 537 } 538 539 static int qcom_qspi_remove(struct platform_device *pdev) 540 { 541 struct spi_master *master = platform_get_drvdata(pdev); 542 543 /* Unregister _before_ disabling pm_runtime() so we stop transfers */ 544 spi_unregister_master(master); 545 546 pm_runtime_disable(&pdev->dev); 547 548 return 0; 549 } 550 551 static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev) 552 { 553 struct spi_master *master = dev_get_drvdata(dev); 554 struct qcom_qspi *ctrl = spi_master_get_devdata(master); 555 int ret; 556 557 clk_bulk_disable_unprepare(QSPI_NUM_CLKS, ctrl->clks); 558 559 ret = icc_disable(ctrl->icc_path_cpu_to_qspi); 560 if (ret) { 561 dev_err_ratelimited(ctrl->dev, "%s: ICC disable failed for cpu :%d\n", 562 __func__, ret); 563 return ret; 564 } 565 566 return 0; 567 } 568 569 static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev) 570 { 571 struct spi_master *master = dev_get_drvdata(dev); 572 struct qcom_qspi *ctrl = spi_master_get_devdata(master); 573 int ret; 574 > 575 ret = icc_enable(ctrl->icc_path_cpu_to_qspi); 576 if (ret) { 577 dev_err_ratelimited(ctrl->dev, "%s: ICC enable failed for cpu :%d\n", 578 __func__, ret); 579 return ret; 580 } 581 582 return clk_bulk_prepare_enable(QSPI_NUM_CLKS, ctrl->clks); 583 } 584 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c index 3c4f83b..d76001a 100644 --- a/drivers/spi/spi-qcom-qspi.c +++ b/drivers/spi/spi-qcom-qspi.c @@ -2,6 +2,7 @@ // Copyright (c) 2017-2018, The Linux foundation. All rights reserved. #include <linux/clk.h> +#include <linux/interconnect.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> @@ -139,7 +140,10 @@ struct qcom_qspi { struct device *dev; struct clk_bulk_data *clks; struct qspi_xfer xfer; - /* Lock to protect xfer and IRQ accessed registers */ + struct icc_path *icc_path_cpu_to_qspi; + unsigned int avg_bw_cpu; + unsigned int peak_bw_cpu; + /* Lock to protect data accessed by IRQs */ spinlock_t lock; }; @@ -241,6 +245,20 @@ static int qcom_qspi_transfer_one(struct spi_master *master, return ret; } + /* + * Set BW quota for CPU as driver supports FIFO mode only. + * We don't have explicit peak requirement so keep it equal to avg_bw. + */ + ctrl->avg_bw_cpu = Bps_to_icc(speed_hz); + ctrl->peak_bw_cpu = ctrl->avg_bw_cpu; + ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, ctrl->avg_bw_cpu, + ctrl->peak_bw_cpu); + if (ret) { + dev_err(ctrl->dev, "%s: ICC BW voting failed for cpu :%d\n", + __func__, ret); + return ret; + } + spin_lock_irqsave(&ctrl->lock, flags); /* We are half duplex, so either rx or tx will be set */ @@ -458,6 +476,29 @@ static int qcom_qspi_probe(struct platform_device *pdev) if (ret) goto exit_probe_master_put; + ctrl->icc_path_cpu_to_qspi = devm_of_icc_get(dev, "qspi-config"); + if (IS_ERR(ctrl->icc_path_cpu_to_qspi)) { + ret = PTR_ERR(ctrl->icc_path_cpu_to_qspi); + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get cpu path :%d\n", ret); + goto exit_probe_master_put; + } + /* Set BW vote for register access */ + ret = icc_set_bw(ctrl->icc_path_cpu_to_qspi, Bps_to_icc(1000), + Bps_to_icc(1000)); + if (ret) { + dev_err(ctrl->dev, "%s: ICC BW voting failed for cpu :%d\n", + __func__, ret); + goto exit_probe_master_put; + } + + ret = icc_disable(ctrl->icc_path_cpu_to_qspi); + if (ret) { + dev_err(ctrl->dev, "%s: ICC disable failed for cpu :%d\n", + __func__, ret); + goto exit_probe_master_put; + } + ret = platform_get_irq(pdev, 0); if (ret < 0) goto exit_probe_master_put; @@ -511,9 +552,17 @@ static int __maybe_unused qcom_qspi_runtime_suspend(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct qcom_qspi *ctrl = spi_master_get_devdata(master); + int ret; clk_bulk_disable_unprepare(QSPI_NUM_CLKS, ctrl->clks); + ret = icc_disable(ctrl->icc_path_cpu_to_qspi); + if (ret) { + dev_err_ratelimited(ctrl->dev, "%s: ICC disable failed for cpu :%d\n", + __func__, ret); + return ret; + } + return 0; } @@ -521,6 +570,14 @@ static int __maybe_unused qcom_qspi_runtime_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct qcom_qspi *ctrl = spi_master_get_devdata(master); + int ret; + + ret = icc_enable(ctrl->icc_path_cpu_to_qspi); + if (ret) { + dev_err_ratelimited(ctrl->dev, "%s: ICC enable failed for cpu :%d\n", + __func__, ret); + return ret; + } return clk_bulk_prepare_enable(QSPI_NUM_CLKS, ctrl->clks); }