From patchwork Mon Aug 10 07:12:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alain Volmat X-Patchwork-Id: 11707015 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5702213A4 for ; Mon, 10 Aug 2020 07:13:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3E612206B5 for ; Mon, 10 Aug 2020 07:13:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="EhtGbDs3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726303AbgHJHNP (ORCPT ); Mon, 10 Aug 2020 03:13:15 -0400 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:17856 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726022AbgHJHNE (ORCPT ); Mon, 10 Aug 2020 03:13:04 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 07A73MKB000844; Mon, 10 Aug 2020 09:12:52 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=jKSSmeCBUayW+bgxcIgwdEOJaCdevskwirZ5mZRYfhE=; b=EhtGbDs3UzXi9CVKnWpOhP79qgf/cahKJcMduDD5QJ29GumOaXOlwxopzB6vlOnOo0w9 qphPrNArKJuQLhd4Z6b6/hL/3sTqk4FCYhkJuFZD8oAO/SAi4gjBwtYRS1Ns3vds62V2 t1K0nNyW7lexXEGog+6Q/DH+XhfCmq5A7tPgooJ/yAokzBjh1VaOcwr/n/XDhchWyQe3 7e957cikAFzf1pud//QStfJqxEhY/zgnzhYdBNWWCX4CQmhBEEFL4o5PMYTQPj3vdxJa C0zBdJFt2SOkMAf9BXPtXbBkloxueXR5mk1qa4OrnoKXUuoGqzUpo70qzyC4xoSmbkzu 6A== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 32sm6f69v8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 10 Aug 2020 09:12:52 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 09FAC10003A; Mon, 10 Aug 2020 09:12:52 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id F1BF52AD9EB; Mon, 10 Aug 2020 09:12:51 +0200 (CEST) Received: from localhost (10.75.127.47) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 10 Aug 2020 09:12:51 +0200 From: Alain Volmat To: , CC: , , , , , , , Subject: [PATCH v2 4/5] spi: stm32: fixes suspend/resume management Date: Mon, 10 Aug 2020 09:12:37 +0200 Message-ID: <1597043558-29668-5-git-send-email-alain.volmat@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597043558-29668-1-git-send-email-alain.volmat@st.com> References: <1597043558-29668-1-git-send-email-alain.volmat@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-08-10_02:2020-08-06,2020-08-10 signatures=0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Amelie Delaunay This patch adds pinctrl power management, and reconfigure spi controller in case of resume. Fixes: 038ac869c9d2 ("spi: stm32: add runtime PM support") Signed-off-by: Amelie Delaunay Signed-off-by: Alain Volmat --- v2: identical to v1 drivers/spi/spi-stm32.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 571dea72bf7e..9b90a22543fd 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -2007,6 +2008,8 @@ static int stm32_spi_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); + pinctrl_pm_select_sleep_state(&pdev->dev); + return 0; } @@ -2018,13 +2021,18 @@ static int stm32_spi_runtime_suspend(struct device *dev) clk_disable_unprepare(spi->clk); - return 0; + return pinctrl_pm_select_sleep_state(dev); } static int stm32_spi_runtime_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); struct stm32_spi *spi = spi_master_get_devdata(master); + int ret; + + ret = pinctrl_pm_select_default_state(dev); + if (ret) + return ret; return clk_prepare_enable(spi->clk); } @@ -2054,10 +2062,23 @@ static int stm32_spi_resume(struct device *dev) return ret; ret = spi_master_resume(master); - if (ret) + if (ret) { clk_disable_unprepare(spi->clk); + return ret; + } - return ret; + ret = pm_runtime_get_sync(dev); + if (ret) { + dev_err(dev, "Unable to power device:%d\n", ret); + return ret; + } + + spi->cfg->config(spi); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + + return 0; } #endif