spi: spi-geni-qcom: Select FIFO mode for chip select

Commit Message

Vijaya Krishna Nivarthi May 9, 2023, 10:01 a.m. UTC

Spi geni driver switches between FIFO and DMA modes based on xfer length.
FIFO mode relies on M_CMD_DONE_EN interrupt for completion while DMA mode
relies on XX_DMA_DONE.
During dynamic switching, if FIFO mode is chosen, FIFO related interrupts
are enabled and DMA related interrupts are disabled. And viceversa.
Chip select shares M_CMD_DONE_EN interrupt with FIFO to check completion.
Now, if a chip select operation is preceded by a DMA xfer, M_CMD_DONE_EN
interrupt would have been disabled and hence it will never receive one
resulting in timeout.

For chip select, in addition to setting the xfer mode to FIFO,
select_mode() to FIFO so that required interrupts are enabled.

Fixes: e5f0dfa78ac7 ("spi: spi-geni-qcom: Add support for SE DMA mode")
Suggested-by: Praveen Talari <[e-mail]>
Signed-off-by: Vijaya Krishna Nivarthi <[e-mail]>
---
 drivers/spi/spi-geni-qcom.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Doug Anderson May 9, 2023, 2:25 p.m. UTC | #1

Hi,

On Tue, May 9, 2023 at 3:01 AM Vijaya Krishna Nivarthi
<[e-mail]> wrote:
>
> Spi geni driver switches between FIFO and DMA modes based on xfer length.
> FIFO mode relies on M_CMD_DONE_EN interrupt for completion while DMA mode
> relies on XX_DMA_DONE.
> During dynamic switching, if FIFO mode is chosen, FIFO related interrupts
> are enabled and DMA related interrupts are disabled. And viceversa.
> Chip select shares M_CMD_DONE_EN interrupt with FIFO to check completion.
> Now, if a chip select operation is preceded by a DMA xfer, M_CMD_DONE_EN
> interrupt would have been disabled and hence it will never receive one
> resulting in timeout.
>
> For chip select, in addition to setting the xfer mode to FIFO,
> select_mode() to FIFO so that required interrupts are enabled.
>
> Fixes: e5f0dfa78ac7 ("spi: spi-geni-qcom: Add support for SE DMA mode")
> Suggested-by: Praveen Talari <[e-mail]>
> Signed-off-by: Vijaya Krishna Nivarthi <[e-mail]>
> ---
>  drivers/spi/spi-geni-qcom.c | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Douglas Anderson <[e-mail]>

Mark Brown May 11, 2023, 6:01 a.m. UTC | #2

On Tue, 09 May 2023 15:31:36 +0530, Vijaya Krishna Nivarthi wrote:
> Spi geni driver switches between FIFO and DMA modes based on xfer length.
> FIFO mode relies on M_CMD_DONE_EN interrupt for completion while DMA mode
> relies on XX_DMA_DONE.
> During dynamic switching, if FIFO mode is chosen, FIFO related interrupts
> are enabled and DMA related interrupts are disabled. And viceversa.
> Chip select shares M_CMD_DONE_EN interrupt with FIFO to check completion.
> Now, if a chip select operation is preceded by a DMA xfer, M_CMD_DONE_EN
> interrupt would have been disabled and hence it will never receive one
> resulting in timeout.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/1] spi: spi-geni-qcom: Select FIFO mode for chip select
      commit: 4c329f5da7cfa366bacfda1328a025dd38951317

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

Patch

diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 8a7d1c2..e423efc 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -294,6 +294,8 @@  static void spi_geni_set_cs(struct spi_device *slv, bool set_flag)
 	mas->cs_flag = set_flag;
 	/* set xfer_mode to FIFO to complete cs_done in isr */
 	mas->cur_xfer_mode = GENI_SE_FIFO;
+	geni_se_select_mode(se, mas->cur_xfer_mode);
+
 	reinit_completion(&mas->cs_done);
 	if (set_flag)
 		geni_se_setup_m_cmd(se, SPI_CS_ASSERT, 0);