From patchwork Mon Feb 27 12:08:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 9593039 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8766E60574 for ; Mon, 27 Feb 2017 12:12:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DBD5283C2 for ; Mon, 27 Feb 2017 12:12:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 727A628488; Mon, 27 Feb 2017 12:12:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E6E7028487 for ; Mon, 27 Feb 2017 12:12:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751841AbdB0MM5 (ORCPT ); Mon, 27 Feb 2017 07:12:57 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:19547 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751688AbdB0MM4 (ORCPT ); Mon, 27 Feb 2017 07:12:56 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v1RC99gk032506; Mon, 27 Feb 2017 06:09:09 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v1RC98m5013995; Mon, 27 Feb 2017 06:09:08 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Mon, 27 Feb 2017 06:09:08 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v1RC90lL014396; Mon, 27 Feb 2017 06:09:05 -0600 From: Vignesh R To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Cyrille Pitchen CC: , , , Vignesh R , Frode Isaksen , Subject: [RFC PATCH 1/2] mtd: spi-nor: Introduce bounce buffer to handle vmalloc'd buffers Date: Mon, 27 Feb 2017 17:38:38 +0530 Message-ID: <20170227120839.16545-2-vigneshr@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170227120839.16545-1-vigneshr@ti.com> References: <20170227120839.16545-1-vigneshr@ti.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Filesystems like UBIFS may pass vmalloc'd buffers to SPI NOR layer which will end up in SPI layer. SPI core does try to handle such buffers (see spi_map_buf()) by doing vmalloc_to_page() and creating scatterlist. But, its known that this does not work well with VIVT/aliasing cache architectures. This also fails when buffers are addressed using LPAE (buffers in region higher than 32 bit addressable region), if DMA is 32bit only. Introduce bounce buffers support in SPI NOR framework to handle vmalloc'd buffers. Use a pre-allocated per flash bounce buffer equal to the sector size of the flash. Flash drivers can enable this feature by setting SNOR_F_USE_BOUNCE_BUFFER flag. This would also enable SPI NOR drivers to safely use DMA in their read/write callbacks. Signed-off-by: Vignesh R --- drivers/mtd/spi-nor/spi-nor.c | 30 +++++++++++++++++++++++++++--- include/linux/mtd/spi-nor.h | 4 ++++ 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 747645c74134..c241fefa5aff 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -1205,11 +1206,21 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, while (len) { loff_t addr = from; + bool use_bb = false; + u_char *dst_buf = buf; + size_t buf_len = len; if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT) addr = spi_nor_s3an_addr_convert(nor, addr); - ret = nor->read(nor, addr, len, buf); + if (!virt_addr_valid(buf) && nor->bounce_buf) { + use_bb = true; + dst_buf = nor->bounce_buf; + if (len > mtd->erasesize) + buf_len = mtd->erasesize; + } + + ret = nor->read(nor, from, buf_len, dst_buf); if (ret == 0) { /* We shouldn't see 0-length reads */ ret = -EIO; @@ -1217,7 +1228,8 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, } if (ret < 0) goto read_err; - + if (use_bb) + memcpy(buf, dst_buf, ret); WARN_ON(ret > len); *retlen += ret; buf += ret; @@ -1329,6 +1341,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, return ret; for (i = 0; i < len; ) { + const u_char *src_buf = buf + i; ssize_t written; loff_t addr = to + i; @@ -1354,8 +1367,13 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, if (nor->flags & SNOR_F_S3AN_ADDR_DEFAULT) addr = spi_nor_s3an_addr_convert(nor, addr); + if (!virt_addr_valid(buf) && nor->bounce_buf) { + memcpy(nor->bounce_buf, buf + i, page_remain); + src_buf = nor->bounce_buf; + } + write_enable(nor); - ret = nor->write(nor, addr, page_remain, buf + i); + ret = nor->write(nor, addr, page_remain, src_buf); if (ret < 0) goto write_err; written = ret; @@ -1720,6 +1738,12 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) return -EINVAL; } + if (nor->flags & SNOR_F_USE_BOUNCE_BUFFER) { + nor->bounce_buf = devm_kmalloc(dev, mtd->erasesize, GFP_KERNEL); + if (!nor->bounce_buf) + dev_err(dev, "unable to allocated bounce buffer\n"); + } + nor->read_dummy = spi_nor_read_dummy_cycles(nor); if (info->flags & SPI_S3AN) { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index f2a718030476..3846ff5fa011 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -141,6 +141,7 @@ enum spi_nor_option_flags { SNOR_F_NO_OP_CHIP_ERASE = BIT(2), SNOR_F_S3AN_ADDR_DEFAULT = BIT(3), SNOR_F_READY_XSR_RDY = BIT(4), + SNOR_F_USE_BOUNCE_BUFFER = BIT(5), }; /** @@ -173,6 +174,8 @@ enum spi_nor_option_flags { * @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR * @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is * completely locked + * @bounce_buf bounce buffer to use incase of vmalloc'd buffers, + * for drivers that may use DMA. * @priv: the private data */ struct spi_nor { @@ -205,6 +208,7 @@ struct spi_nor { int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); + void *bounce_buf; void *priv; };