| Message ID | 20170416233805.15973-1-hauke@hauke-m.de (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 833bfade96561216aa2129516a5926a0326860a2 |
| Headers | show |
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 90b5b2efafbf..b4a8bb7759b2 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -1015,7 +1015,7 @@ static int spi_transfer_one_message(struct spi_master *master, ret = 0; ms = 8LL * 1000LL * xfer->len; do_div(ms, xfer->speed_hz); - ms += ms + 100; /* some tolerance */ + ms += ms + 200; /* some tolerance */ if (ms > UINT_MAX) ms = UINT_MAX;
The generic SPI code calculates how long the issued transfer would take and adds 100ms in addition to the timeout as tolerance. On my 500 MHz Lantiq Mips SoC I am getting timeouts from the SPI like this when the system boots up: m25p80 spi32766.4: SPI transfer timed out blk_update_request: I/O error, dev mtdblock3, sector 2 SQUASHFS error: squashfs_read_data failed to read block 0x6e After increasing the tolerance for the timeout to 200ms I haven't seen these SPI transfer time outs any more. The Lantiq SPI driver in use here has an extra work queue in between, which gets triggered when the controller send the last word and the hardware FIFOs used for reading and writing are only 8 words long. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> --- drivers/spi/spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)