From patchwork Sun Apr 23 11:18:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leif Middelschulte X-Patchwork-Id: 9694789 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2ABE560245 for ; Sun, 23 Apr 2017 11:19:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 08E1E26B41 for ; Sun, 23 Apr 2017 11:19:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DEB0C26E4D; Sun, 23 Apr 2017 11:19:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6552E26B41 for ; Sun, 23 Apr 2017 11:19:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1044889AbdDWLTW (ORCPT ); Sun, 23 Apr 2017 07:19:22 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:34302 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1044861AbdDWLTV (ORCPT ); Sun, 23 Apr 2017 07:19:21 -0400 Received: by mail-wr0-f194.google.com with SMTP id 6so3085590wrb.1 for ; Sun, 23 Apr 2017 04:19:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=sgPhM8wCCsOAdLm34xRhgvtFS1fY5fYg8XCLhj43G3k=; b=fY+BKUBjQiLxJ0t57YLh5763KTVA+XVIA923OdA414bPD2Wg3ibXQp0cUr9MMtUxtF Fdg9Fp3UPiIFRQzx07tjVHWJ8y81r6vYWr7vSkrouPk4kd7Z0fruS1dYKEjRbYVEH95R prPHm5oas2wae9aKpds0ONwZ+X/7hbcPgIMargic0awrIiBMnmSaXRN/O5cdDdd3tezY WwtId4MdptmPA2DSal1ufVVj81SnP2Yn8sxpICuA6BvwYGbV8zHwowJ4pPR7wPVeBkUB mlWYwRZNjLAZc9G1/YmjxD8H+jV09HT86ZFq5mte2fvLF8nwRHBCYmmk4RyGjhX+RnmJ oU4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=sgPhM8wCCsOAdLm34xRhgvtFS1fY5fYg8XCLhj43G3k=; b=WE3z5fv8Z88UidvLlhQ2jKxzlxtwMHfvJwjkvoTa5faumtzpM2p08hJlZMCIYBt7fi Oy0QtDXLVpWNQFo+VDgm6zTlr203ERXBGVD98cgRy+KO8xnNo8XkH74DWDyu0qAzNjZZ saSN7boQA1zmzFX8AJlH3odwAnuYyYsaOh9XBuFtBrOaxgpgcbc54sMgcGBHCFGnUVUI TKKztqzKNkCIuqzbFgkhdHiTJNQqIMOGvN9zyRJhCaRFVXRbeOhwn6uliphgW/0nX7em iguq7oECqPp5q9W4skMkzM+HCkuFf9l8y/9MT87lFy7p0r+zwt3v+kHt/4eWdKfIBRfo Zmrw== X-Gm-Message-State: AN3rC/76zYOD8io7hvtPrm+hUpsXoP6bD0pnKGTNJxyqt9QXJUeR8kiv onLTBwQnRWxTY7uw0R4= X-Received: by 10.223.170.197 with SMTP id i5mr1515893wrc.159.1492946359879; Sun, 23 Apr 2017 04:19:19 -0700 (PDT) Received: from UML026.umk.kls.zentral ([2a02:908:1392:640::6]) by smtp.gmail.com with ESMTPSA id h199sm9017946wme.4.2017.04.23.04.19.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 23 Apr 2017 04:19:18 -0700 (PDT) From: Leif Middelschulte X-Google-Original-From: Leif Middelschulte To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, Leif Middelschulte Subject: [PATCH v2] spi-imx: Implements handling of the SPI_READY mode flag. Date: Sun, 23 Apr 2017 13:18:37 +0200 Message-Id: <20170423111837.19460-1-Leif.Middelschulte@gmail.com> X-Mailer: git-send-email 2.12.2 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Leif Middelschulte This patch implements consideration of the SPI_READY mode flag as defined in spi.h. It extends the device tree bindings to support the values defined by the reference manual for the DRCTL field. Thus supporting edge-triggered and level-triggered bursts. Signed-off-by: Leif Middelschulte --- .../devicetree/bindings/spi/fsl-imx-cspi.txt | 5 +++++ drivers/spi/spi-imx.c | 23 ++++++++++++++++++++-- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt index 8bc95e2fc47f..890b3ff3325f 100644 --- a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt +++ b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt @@ -23,6 +23,10 @@ See the clock consumer binding, Obsolete properties: - fsl,spi-num-chipselects : Contains the number of the chipselect +Optional properties: +- fsl,spi-drctl: Integer, representing the value of DRCTL. Note that to +enable the DRCTL consideration, the SPI_READY mode-flag needs to be set. + Example: ecspi@70010000 { @@ -35,4 +39,5 @@ ecspi@70010000 { <&gpio3 25 0>; /* GPIO3_25 */ dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; dma-names = "rx", "tx"; + fsl,spi-drctl = <1>; }; diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 9a7c62f471dc..647a4bf18705 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -95,6 +95,7 @@ struct spi_imx_data { unsigned int spi_bus_clk; unsigned int bytes_per_word; + unsigned int spi_drctl; unsigned int count; void (*tx)(struct spi_imx_data *); @@ -246,6 +247,7 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, #define MX51_ECSPI_CTRL_XCH (1 << 2) #define MX51_ECSPI_CTRL_SMC (1 << 3) #define MX51_ECSPI_CTRL_MODE_MASK (0xf << 4) +#define MX51_ECSPI_CTRL_DRCTL(drctl) ((drctl) << 16) #define MX51_ECSPI_CTRL_POSTDIV_OFFSET 8 #define MX51_ECSPI_CTRL_PREDIV_OFFSET 12 #define MX51_ECSPI_CTRL_CS(cs) ((cs) << 18) @@ -355,6 +357,12 @@ static int mx51_ecspi_config(struct spi_device *spi, */ ctrl |= MX51_ECSPI_CTRL_MODE_MASK; + /* + * Enable SPI_RDY handling (falling edge/level triggered). + */ + if (spi->mode & SPI_READY) + ctrl |= MX51_ECSPI_CTRL_DRCTL(spi_imx->spi_drctl); + /* set clock speed */ ctrl |= mx51_ecspi_clkdiv(spi_imx, config->speed_hz, &clk); spi_imx->spi_bus_clk = clk; @@ -1173,7 +1181,7 @@ static int spi_imx_probe(struct platform_device *pdev) struct spi_master *master; struct spi_imx_data *spi_imx; struct resource *res; - int i, ret, irq; + int i, ret, irq, spi_drctl; if (!np && !mxc_platform_info) { dev_err(&pdev->dev, "can't get the platform data\n"); @@ -1181,6 +1189,15 @@ static int spi_imx_probe(struct platform_device *pdev) } master = spi_alloc_master(&pdev->dev, sizeof(struct spi_imx_data)); + ret = of_property_read_u32(np, "fsl,spi-drctl", &spi_drctl); + if ((ret < 0) || (spi_drctl == 0x3)) { + // '11' is reserved + spi_drctl = 0; + } else { + // only the values '00', '01' and '11' are valid + spi_drctl &= 0x3; + } + if (!master) return -ENOMEM; @@ -1216,7 +1233,9 @@ static int spi_imx_probe(struct platform_device *pdev) spi_imx->bitbang.master->unprepare_message = spi_imx_unprepare_message; spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; if (is_imx35_cspi(spi_imx) || is_imx51_ecspi(spi_imx)) - spi_imx->bitbang.master->mode_bits |= SPI_LOOP; + spi_imx->bitbang.master->mode_bits |= SPI_LOOP | SPI_READY; + + spi_imx->spi_drctl = spi_drctl; init_completion(&spi_imx->xfer_done);