From patchwork Tue Sep 4 12:41:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10587333 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8AE1B13BB for ; Tue, 4 Sep 2018 12:41:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7C67529478 for ; Tue, 4 Sep 2018 12:41:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7A7662947E; Tue, 4 Sep 2018 12:41:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0236E294B5 for ; Tue, 4 Sep 2018 12:41:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726203AbeIDRGb (ORCPT ); Tue, 4 Sep 2018 13:06:31 -0400 Received: from mail-lf1-f67.google.com ([209.85.167.67]:46281 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726108AbeIDRGb (ORCPT ); Tue, 4 Sep 2018 13:06:31 -0400 Received: by mail-lf1-f67.google.com with SMTP id e23-v6so2784352lfc.13 for ; Tue, 04 Sep 2018 05:41:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=0R2o2oDVigWmkgDco1YurZOejFFyofsCuVIFyagOqYY=; b=ZZFMIhmXahPghBp+VjfDATz6eDjTXhCU5u3Wsly2+jWJSz/rWHn8q7E7NOgyxpvB1D 0GMpqm+38QHP73fPvCzE+iEO91zrQi7heGvQUwsIIBbAdrQIctgU9s/FR6KTvnTOj3MD g51NdKpytripdhxuCkjGhk1zr8JCCmIkhCujw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=0R2o2oDVigWmkgDco1YurZOejFFyofsCuVIFyagOqYY=; b=Vi4XPo5hF/vSvxVonhwQGBr//MFEHLMQPZZI4eEIsp1yzLplsXh/ViXmG9eyLpwlK/ ukX2zgyEnSq0G1YVBs4cWJ8nrFEyD93V9MXCm1PY5/GG6T2/aSqInPWS833sAU+rmSfD v6Wm1vPl/84ZRHgKuZ4eufmHmsPBVlx1xA591XUtiPy7YRrSVlBOx2oud4RFgxiQ8srx yvZVfBBcQNe0FCzOth2aZO4DB6v4mG38yz7nh3aNQKKY/lRDvrRv4ACC8k24V7pdYMxM R4gks7vt3P6lMVpf27Csdx1WjYqtQ0tM2pUfMzJ94vVTs0OQCzDWytp9989gwIdojWhe 3MFA== X-Gm-Message-State: APzg51AC0f2/BcbymJDQw8k7+oBlbiucZv47DOWAE4huYU5Z/H9wnpun QrrYzcK2g8ykRtYch+mdBJicmg== X-Google-Smtp-Source: ANB0VdZKMI7ZpsfDsPrAO8K45Boj922eDe2FG3m/zBOAvE1OxfiiUGkGzRBnf6Q2P6Qq3Cx8pz6w+w== X-Received: by 2002:a19:cb93:: with SMTP id b141-v6mr19809691lfg.119.1536064891506; Tue, 04 Sep 2018 05:41:31 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k4-v6sm4016152ljc.6.2018.09.04.05.41.30 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 04 Sep 2018 05:41:30 -0700 (PDT) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Linus Walleij , Sekhar Nori , Kevin Hilman , Michele Dionisio , Frode Isaksen Subject: [PATCH] spi: davinci: Remove chip select GPIO pdata Date: Tue, 4 Sep 2018 14:41:28 +0200 Message-Id: <20180904124128.14826-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The DaVinci SPI can use either: - Internal chip selects (inside the SPI host) - External chip selects (using GPIO) - External chip selects passed in pdata The last way of passing external chip selects through platform data is not used in the kernel. Delete it to make the code simpler when refactoring GPIO. Cc: Sekhar Nori Cc: Kevin Hilman Cc: Michele Dionisio Cc: Frode Isaksen Signed-off-by: Linus Walleij --- drivers/spi/spi-davinci.c | 7 ------- include/linux/platform_data/spi-davinci.h | 4 ---- 2 files changed, 11 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index a02099c90c5c..76a87a674b87 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -434,13 +434,6 @@ static int davinci_spi_setup(struct spi_device *spi) retval = gpio_direction_output( spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); internal_cs = false; - } else if (pdata->chip_sel && - spi->chip_select < pdata->num_chipselect && - pdata->chip_sel[spi->chip_select] != SPI_INTERN_CS) { - spi->cs_gpio = pdata->chip_sel[spi->chip_select]; - retval = gpio_direction_output( - spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); - internal_cs = false; } if (retval) { diff --git a/include/linux/platform_data/spi-davinci.h b/include/linux/platform_data/spi-davinci.h index f4edcb03c40c..0638fb6353bc 100644 --- a/include/linux/platform_data/spi-davinci.h +++ b/include/linux/platform_data/spi-davinci.h @@ -36,9 +36,6 @@ enum { * @num_chipselect: number of chipselects supported by this SPI master * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt * controller withn the SoC. Possible values are 0 and 1. - * @chip_sel: list of GPIOs which can act as chip-selects for the SPI. - * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary - * to populate if all chip-selects are internal. * @cshold_bug: set this to true if the SPI controller on your chip requires * a write to CSHOLD bit in between transfers (like in DM355). * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any @@ -48,7 +45,6 @@ struct davinci_spi_platform_data { u8 version; u8 num_chipselect; u8 intr_line; - u8 *chip_sel; u8 prescaler_limit; bool cshold_bug; enum dma_event_q dma_event_q;