From patchwork Fri Oct 12 08:48:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 10638077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C6F8E17E1 for ; Fri, 12 Oct 2018 08:49:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B3AE62B758 for ; Fri, 12 Oct 2018 08:49:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A863C2B75B; Fri, 12 Oct 2018 08:49:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3E2182B742 for ; Fri, 12 Oct 2018 08:49:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728020AbeJLQUY (ORCPT ); Fri, 12 Oct 2018 12:20:24 -0400 Received: from mail.bootlin.com ([62.4.15.54]:43203 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728011AbeJLQUY (ORCPT ); Fri, 12 Oct 2018 12:20:24 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 62B3820DD8; Fri, 12 Oct 2018 10:48:58 +0200 (CEST) Received: from localhost.localdomain (AAubervilliers-681-1-7-245.w90-88.abo.wanadoo.fr [90.88.129.245]) by mail.bootlin.com (Postfix) with ESMTPSA id AF3FD20DDF; Fri, 12 Oct 2018 10:48:32 +0200 (CEST) From: Boris Brezillon To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , linux-mtd@lists.infradead.org, Yogesh Gaur , Vignesh R , Cyrille Pitchen Cc: Julien Su , Mason Yang , , Mark Brown , linux-spi@vger.kernel.org Subject: [PATCH RFC 16/18] mtd: spi-nor: Add the concept of full DTR modes Date: Fri, 12 Oct 2018 10:48:23 +0200 Message-Id: <20181012084825.23697-17-boris.brezillon@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20181012084825.23697-1-boris.brezillon@bootlin.com> References: <20181012084825.23697-1-boris.brezillon@bootlin.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Full DTR modes are modes where even the instruction opcode is sent using DTR. Define the relevant macros and enum to add such modes and patch spi_nor_select_preferred_mode() to select them when appropriate. Signed-off-by: Boris Brezillon --- drivers/mtd/spi-nor/spi-nor.c | 17 ++++++++++++++++- include/linux/mtd/spi-nor.h | 29 ++++++++++++++++++++++++++--- 2 files changed, 42 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 9ff957dc351c..849ba0a1c157 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -4124,6 +4124,11 @@ static void spi_nor_select_preferred_mode(struct spi_nor *nor, u32 hwcaps) if (hwcaps & SNOR_HWCPAS_READ_OCTO && hwcaps & SNOR_HWCAPS_PP_OCTO) return; + if (hwcaps & SNOR_HWCAPS_OPI_FULL_DTR) { + nor->preferred_mode = SPI_NOR_MODE_OPI_FULL_DTR; + return; + } + if (hwcaps & SNOR_HWCAPS_OPI) { nor->preferred_mode = SPI_NOR_MODE_OPI; return; @@ -4132,6 +4137,11 @@ static void spi_nor_select_preferred_mode(struct spi_nor *nor, u32 hwcaps) if (hwcaps & SNOR_HWCAPS_READ_QUAD && hwcaps & SNOR_HWCAPS_PP_QUAD) return; + if (hwcaps & SNOR_HWCAPS_QPI_FULL_DTR) { + nor->preferred_mode = SPI_NOR_MODE_QPI_FULL_DTR; + return; + } + if (hwcaps & SNOR_HWCAPS_QPI) { nor->preferred_mode = SPI_NOR_MODE_QPI; return; @@ -4140,6 +4150,11 @@ static void spi_nor_select_preferred_mode(struct spi_nor *nor, u32 hwcaps) if (hwcaps & SNOR_HWCAPS_READ_DUAL) return; + if (hwcaps & SNOR_HWCAPS_DPI_FULL_DTR) { + nor->preferred_mode = SPI_NOR_MODE_DPI_FULL_DTR; + return; + } + if (hwcaps & SNOR_HWCAPS_DPI) { nor->preferred_mode = SPI_NOR_MODE_DPI; return; @@ -4177,7 +4192,7 @@ static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info, * controller directly implements the spi_nor interface. * Yet another reason to switch to spi-mem. */ - ignored_mask = SNOR_HWCAPS_X_X_X; + ignored_mask = SNOR_HWCAPS_X_X_X | SNOR_HWCAPS_XD_XD_XD; if (shared_mask & ignored_mask) { dev_dbg(nor->dev, "SPI n-n-n protocols are not supported.\n"); diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 1035706bc6db..3735d1a0fd0d 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -188,6 +188,10 @@ #define SNOR_PROTO_1_XD_XD(_nbits) \ (SNOR_PROTO_DATA_IS_DTR | SNOR_PROTO_ADDR_IS_DTR | \ SNOR_PROTO_STR(1, _nbits, _nbits)) +#define SNOR_PROTO_XD_XD_XD(_nbits) \ + (SNOR_PROTO_INST_IS_DTR | SNOR_PROTO_DATA_IS_DTR | \ + SNOR_PROTO_ADDR_IS_DTR | \ + SNOR_PROTO_STR(_nbits, _nbits, _nbits)) enum spi_nor_protocol { SNOR_PROTO_1_1_1 = SNOR_PROTO_STR(1, 1, 1), @@ -360,9 +364,13 @@ struct flash_info; enum spi_nor_mode { SPI_NOR_MODE_SPI, + SPI_NOR_MODE_SPI_FULL_DTR, SPI_NOR_MODE_DPI, + SPI_NOR_MODE_DPI_FULL_DTR, SPI_NOR_MODE_QPI, + SPI_NOR_MODE_QPI_FULL_DTR, SPI_NOR_MODE_OPI, + SPI_NOR_MODE_OPI_FULL_DTR, SPI_NOR_NUM_MODES, }; @@ -561,19 +569,34 @@ struct spi_nor_hwcaps { #define SNOR_HWCAPS_DPI BIT(24) #define SNOR_HWCAPS_QPI BIT(25) #define SNOR_HWCAPS_OPI BIT(26) +#define SNOR_HWCAPS_SPI_FULL_DTR BIT(27) +#define SNOR_HWCAPS_DPI_FULL_DTR BIT(28) +#define SNOR_HWCAPS_QPI_FULL_DTR BIT(29) +#define SNOR_HWCAPS_OPI_FULL_DTR BIT(30) #define SNOR_HWCAPS_X_X_X (SNOR_HWCAPS_DPI | \ SNOR_HWCAPS_QPI | \ - SNOR_HWCAPS_OPI) + SNOR_HWCAPS_OPI | \ + SNOR_HWCAPS_SPI_FULL_DTR | \ + SNOR_HWCAPS_DPI_FULL_DTR | \ + SNOR_HWCAPS_QPI_FULL_DTR | \ + SNOR_HWCAPS_OPI_FULL_DTR) + +#define SNOR_HWCAPS_XD_XD_XD (SNOR_HWCAPS_SPI_FULL_DTR | \ + SNOR_HWCAPS_DPI_FULL_DTR | \ + SNOR_HWCAPS_QPI_FULL_DTR | \ + SNOR_HWCAPS_OPI_FULL_DTR) #define SNOR_HWCAPS_DTR (SNOR_HWCAPS_READ_1_1D_1D | \ SNOR_HWCAPS_READ_1_2D_2D | \ SNOR_HWCAPS_READ_1_4D_4D | \ - SNOR_HWCAPS_READ_1_8D_8D) + SNOR_HWCAPS_READ_1_8D_8D | \ + SNOR_HWCAPS_XD_XD_XD) #define SNOR_HWCAPS_ALL (SNOR_HWCAPS_READ_MASK | \ SNOR_HWCAPS_PP_MASK | \ - SNOR_HWCAPS_X_X_X) + SNOR_HWCAPS_X_X_X | \ + SNOR_HWCAPS_XD_XD_XD) /** * spi_nor_scan() - scan the SPI NOR