From patchwork Wed Jan 16 08:21:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10765489 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B984B186E for ; Wed, 16 Jan 2019 08:21:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A9C922D3B9 for ; Wed, 16 Jan 2019 08:21:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9D5412D3C8; Wed, 16 Jan 2019 08:21:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3CDE82D3B9 for ; Wed, 16 Jan 2019 08:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730345AbfAPIV1 (ORCPT ); Wed, 16 Jan 2019 03:21:27 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:38146 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728658AbfAPIVX (ORCPT ); Wed, 16 Jan 2019 03:21:23 -0500 Received: by mail-lj1-f193.google.com with SMTP id c19-v6so4680611lja.5 for ; Wed, 16 Jan 2019 00:21:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DN8sKjFf4O+UFXK/DJwxmaNJcVTsvwJ3Eq5nhk+Hpm4=; b=LG4OXX5skaOYsMsApsA++LC1dH0cw1iMiBxA2pPt4l2wnkxLBzR5tSzgeD4TXi3DRE sWSa3ynZwWKLuMPptMNyBH03j4MDBcgu/J+TjI5osPCw8EJ2JH5EL3y6JwWpHUeu+hjQ cr0lQjnxwNYD2MR05JYGpUR+eLjp5+wjXBnag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DN8sKjFf4O+UFXK/DJwxmaNJcVTsvwJ3Eq5nhk+Hpm4=; b=blVoxvGGNOpHOBmImlgtjpLMvP655q96oM938rGVPqiUp/EmeVRaES6lK+2szmDaao Lq63EJ+3Ma94BMxJ8Ndee2AuHdlee73UiBPYJjF073MGzt7LrbD5TXir8Ys/ojWU6EDt GMfSccucmDpxSCE21conT1Vr7Se+NrIFEsj4A0k3cgzzlNRk7cG0q2pEt7/bu+CbRH45 1osGoEsRzBuWV6XDLGhfTY4SL+VCaJYoboXzvAbJ3blzURW6zvph0rt8rz5bveuNtQv0 JqGAMIVtyHVxnMcF/mzJRw03JwUbplRcW62m7RGScKP7c9JwAp4JrjaIf1E0Wit6o9re lGhw== X-Gm-Message-State: AJcUukfUTbc3uC3Sw6S8DAW7GbsNZ+KXcgp2FUxSEP9KhtG8VrtVhy5j JoNEN3CBaaqwbbNnur0G62EZrA== X-Google-Smtp-Source: ALg8bN6bSA6NrVOy0DDNGQdgufHzLiA8WEEQmZyx990VbjnanFOIrJQWf+X3zLmuaMnMd5JIKYjlBg== X-Received: by 2002:a2e:2a06:: with SMTP id q6-v6mr5421922ljq.37.1547626880620; Wed, 16 Jan 2019 00:21:20 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id z9sm1035095lfj.79.2019.01.16.00.21.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 Jan 2019 00:21:19 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Jan Kotas Subject: [PATCH 2/4 v3] spi: dw: Fix default polarity of native chipselect Date: Wed, 16 Jan 2019 09:21:08 +0100 Message-Id: <20190116082110.5604-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190116082110.5604-1-linus.walleij@linaro.org> References: <20190116082110.5604-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The DW controller also supports platforms specifying native chipselects. When I enforce the use of high CS for drivers opting in for using GPIO descriptors, I inadvertedly switched the driver to also use active high chip select for native chip selects. As it turns out, the DW hardware driving chip selects also thinks it is weird with active low chip selects so all we need to do is remove an inversion in the driver. Cc: Jan Kotas Reported-by: Jan Kotas Tested-by: Jan Kotas Fixes: 9400c41e77b8 ("spi: dw: Convert to use CS GPIO descriptors") Signed-off-by: Linus Walleij --- ChangeLog v1->v3: - Collected Jan's Tested-by ChangeLog v1->v2: - Missed to alter the actually native chip select line control code. I need to be more awake. Janek can you confirm if this in combination with the previous patch solves your problem? --- drivers/spi/spi-dw.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index f54b498001a9..64164f1a83f4 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -137,11 +137,10 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable) struct dw_spi *dws = spi_controller_get_devdata(spi->controller); struct chip_data *chip = spi_get_ctldata(spi); - /* Chip select logic is inverted from spi_set_cs() */ if (chip && chip->cs_control) - chip->cs_control(!enable); + chip->cs_control(enable); - if (!enable) + if (enable) dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select)); else if (dws->cs_override) dw_writel(dws, DW_SPI_SER, 0);