From patchwork Wed Jan 16 08:21:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10765493 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 887AF186E for ; Wed, 16 Jan 2019 08:21:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7AA5D2D3B0 for ; Wed, 16 Jan 2019 08:21:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6E9172D3BA; Wed, 16 Jan 2019 08:21:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C63D2D3B0 for ; Wed, 16 Jan 2019 08:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388579AbfAPIVZ (ORCPT ); Wed, 16 Jan 2019 03:21:25 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:41971 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388578AbfAPIVZ (ORCPT ); Wed, 16 Jan 2019 03:21:25 -0500 Received: by mail-lf1-f67.google.com with SMTP id c16so4172591lfj.8 for ; Wed, 16 Jan 2019 00:21:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UPa/YKHzg8QHfVtFHuz+IOXkWhk9XCGi6iwwT/+Ih94=; b=GUIaGw6+Vbc4PwSUs42d9NzRrpbccX+Ic5qi/fuieH8pdTHCaBtlzjCLiZ1w6kuLQR WKftHzbX7U1+tSVsp7ucXSyb+UMTUHIuC4AZPr20Wn2UFpnhoQZiF+CS1xyXFSQHHA2o DqBsbG/huYZquDI3iV/ZyYyGpc7hXz/zCuFEI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UPa/YKHzg8QHfVtFHuz+IOXkWhk9XCGi6iwwT/+Ih94=; b=PhCifIH6yXSM5q6CBDxPeqziwN5nSHAXyQ6vl60TxL1FnQdbfP1TihjGI8Frfb2zIw tOvDpmxI07Foz1jinl0JjsyuWcEH2xoPOgZdo8FAvgqkJyuLOK7re/QlBCawuvmwOZ/c 90CQRL1f3wXTmqRMOPRDa5TJqdvj936iOMA3xNS8q80Zs/wxPfOeJ1fhmcxAmnKmSh1+ 61vnbUY3NrHOfDeDALbyNDqKxQnfwkozrMgeNkorRxSB18GXahFQXVd3L0fZf2T6aiJQ jj6gHuURdvh0QWlXdTSZLtA/alA4G1kxYoSj7DT3Vql+G/h5n5Mvt5mtlUNojOpZdajp Eh7Q== X-Gm-Message-State: AJcUukd8R920VgYMKlR2uVRLloOTspvmWZ4pwJPg+e8qR97/+JcoCmLK tuWgddrJUmFehh2q7B8ohkw82w== X-Google-Smtp-Source: ALg8bN6nexG4rpiYuH5P12Q4u4XAR3wGItstqNyie1DvcWfimZEBZPtKoEFAaCSW+YjyZRBeil7dBg== X-Received: by 2002:a19:4948:: with SMTP id l8mr6021684lfj.156.1547626882916; Wed, 16 Jan 2019 00:21:22 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id z9sm1035095lfj.79.2019.01.16.00.21.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 16 Jan 2019 00:21:21 -0800 (PST) From: Linus Walleij To: Mark Brown , linux-spi@vger.kernel.org Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , linuxarm@huawei.com, Linus Walleij , Wei Yongjun Subject: [PATCH 3/4 v3] spi: cadence: Fix default polarity of native chipselect Date: Wed, 16 Jan 2019 09:21:09 +0100 Message-Id: <20190116082110.5604-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190116082110.5604-1-linus.walleij@linaro.org> References: <20190116082110.5604-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Cadence controller also supports platforms specifying native chipselects. When I enforce the use of high CS for drivers opting in for using GPIO descriptors, I inadvertedly switched the driver to also use active high chip select for native chip selects. Fix this by inverting the logic in the callback for the native chip select. Rename the parameter from "is_high" (which is interpreted as being high when 0, which is confusing, I will not make any drug-related jokes here) to "enabled" which is more intuitive, especially now that it is true when CS is supposed to be enabled. Cc: Wei Yongjun Fixes: cfeefa79dc37 ("spi: cadence: Convert to use CS GPIO descriptors") Signed-off-by: Linus Walleij --- ChangeLog v1->v3: - Resending --- drivers/spi/spi-cadence.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index e332d173dbf9..f635cf073601 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -172,16 +172,16 @@ static void cdns_spi_init_hw(struct cdns_spi *xspi) /** * cdns_spi_chipselect - Select or deselect the chip select line * @spi: Pointer to the spi_device structure - * @is_high: Select(0) or deselect (1) the chip select line + * @enable: Select (1) or deselect (0) the chip select line */ -static void cdns_spi_chipselect(struct spi_device *spi, bool is_high) +static void cdns_spi_chipselect(struct spi_device *spi, bool enable) { struct cdns_spi *xspi = spi_master_get_devdata(spi->master); u32 ctrl_reg; ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR); - if (is_high) { + if (!enable) { /* Deselect the slave */ ctrl_reg |= CDNS_SPI_CR_SSCTRL; } else {