diff mbox series

spi: pxa2xx: Set minimum transfer speed

Message ID 20190628140717.7552-1-jarkko.nikula@linux.intel.com (mailing list archive)
State Accepted
Commit 23cdddb21f41e6092643fb8403f992f99ade33be
Headers show
Series spi: pxa2xx: Set minimum transfer speed | expand

Commit Message

Jarkko Nikula June 28, 2019, 2:07 p.m. UTC 
It is possible to request a transfer with a speed lower than supported
by the HW. This causes silent divider calculation underflow in
ssp_get_clk_div() which leads to a frequency higher than requested. Up to
maximum speed of the controller.

Set the minimum supported transfer speed and let the SPI core to
validate no transfers have speed lower than supported.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
---
 drivers/spi/spi-pxa2xx.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index af3f37ba82c8..259c20f7a542 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -1704,6 +1704,16 @@  static int pxa2xx_spi_probe(struct platform_device *pdev)
 		goto out_error_dma_irq_alloc;
 
 	controller->max_speed_hz = clk_get_rate(ssp->clk);
+	/*
+	 * Set minimum speed for all other platforms than Intel Quark which is
+	 * able do under 1 Hz transfers.
+	 */
+	if (!pxa25x_ssp_comp(drv_data))
+		controller->min_speed_hz =
+			DIV_ROUND_UP(controller->max_speed_hz, 4096);
+	else if (!is_quark_x1000_ssp(drv_data))
+		controller->min_speed_hz =
+			DIV_ROUND_UP(controller->max_speed_hz, 512);
 
 	/* Load default SSP configuration */
 	pxa2xx_spi_write(drv_data, SSCR0, 0);