| Message ID | 20191108105920.19014-2-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | spi: zynq-qspi: Clarify and fix the chip selection | expand |
On Fri, Nov 08, 2019 at 11:59:14AM +0100, Miquel Raynal wrote: > Unlike what the driver is currently advertizing, CS0 only can be used, > CS1 is not supported at all. Prevent people to use CS1. This (and the rest of the series) doesn't apply against current code, please check and resend.
Hi Mark, Mark Brown <broonie@kernel.org> wrote on Fri, 8 Nov 2019 12:07:32 +0000: > On Fri, Nov 08, 2019 at 11:59:14AM +0100, Miquel Raynal wrote: > > Unlike what the driver is currently advertizing, CS0 only can be used, > > CS1 is not supported at all. Prevent people to use CS1. > > This (and the rest of the series) doesn't apply against current code, > please check and resend. My bad, I thought I was working on a v5.3 while I was on a v5.1. Let me rebase and resend the whole patchset. Sorry for the mistake. Thanks, Miquèl
diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c index 87c9ec21f093..8098b5087708 100644 --- a/drivers/spi/spi-zynq-qspi.c +++ b/drivers/spi/spi-zynq-qspi.c @@ -704,10 +704,15 @@ static int zynq_qspi_probe(struct platform_device *pdev) ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); - if (ret < 0) + if (ret < 0) { ctlr->num_chipselect = ZYNQ_QSPI_DEFAULT_NUM_CS; - else + } else if (num_cs > ZYNQ_QSPI_DEFAULT_NUM_CS) { + dev_err(&pdev->dev, "anything but CS0 is not yet supported\n"); + goto remove_master; + } else { ctlr->num_chipselect = num_cs; + } + ctlr->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_DUAL | SPI_TX_QUAD; ctlr->mem_ops = &zynq_qspi_mem_ops;
Unlike what the driver is currently advertizing, CS0 only can be used, CS1 is not supported at all. Prevent people to use CS1. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/spi/spi-zynq-qspi.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)