diff mbox series

[V2,3/5] spi: spi-nxp-fspi: Enable the Octal Mode in MCR0

Message ID 20200202125950.1825013-3-aford173@gmail.com (mailing list archive)
State New, archived
Headers show
Series [V2,1/5] spi: fspi: enable fspi on imx8qxp and imx8mm | expand

Commit Message

Adam Ford Feb. 2, 2020, 12:59 p.m. UTC 
From: Han Xu <han.xu@nxp.com>

Apply patch from NXP upstream repo to
Enable the octal combination mode in MCR0

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
---
V2: Reorder s-o-b lines to give credit in proper order.

Comments

Mark Brown Feb. 12, 2020, 12:04 p.m. UTC | #1 
On Sun, Feb 02, 2020 at 06:59:48AM -0600, Adam Ford wrote:
> From: Han Xu <han.xu@nxp.com>
> 
> Apply patch from NXP upstream repo to
> Enable the octal combination mode in MCR0

Why?
diff mbox series

Patch

diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 23abf5ae318e..019f40e2917c 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -913,8 +913,9 @@  static int nxp_fspi_default_setup(struct nxp_fspi *f)
 	fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);
 
 	/* enable module */
-	fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) | FSPI_MCR0_IP_TIMEOUT(0xFF),
-		 base + FSPI_MCR0);
+	fspi_writel(f, FSPI_MCR0_AHB_TIMEOUT(0xFF) |
+		    FSPI_MCR0_IP_TIMEOUT(0xFF) | (u32) FSPI_MCR0_OCTCOMB_EN,
+		    base + FSPI_MCR0);
 
 	/*
 	 * Disable same device enable bit and configure all slave devices