| Message ID | 20200313154645.29293-6-p.yadav@ti.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | mtd: spi-nor: add xSPI Octal DTR support | expand |
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 9e0724f2a825..9335692e9bcb 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -3772,6 +3772,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, /* Number of address bytes. */ switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) { case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY: + case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4: nor->addr_width = 3; break;
JESD216D.01 says that when the address width can be 3 or 4, it defaults to 3 and enters 4-byte mode when given the appropriate command. So, when we see a configurable width, default to 3 and let flash that default to 4 change it in a post-bfpt fixup. This fixes SMPT parsing for flashes with configurable address width. If the SMPT descriptor advertises variable address width, we use nor->addr_width as the address width. But since it was not set to any value from the SFDP table, the read command uses an address width of 0, resulting in an incorrect read being issued. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/mtd/spi-nor/spi-nor.c | 1 + 1 file changed, 1 insertion(+)