Message ID | 20200522224042.29970-4-p.yadav@ti.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show
Return-Path: <SRS0=RqMj=7E=vger.kernel.org=linux-spi-owner@kernel.org> Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A3781391 for <patchwork-linux-spi@patchwork.kernel.org>; Fri, 22 May 2020 22:41:31 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E6E06206B6 for <patchwork-linux-spi@patchwork.kernel.org>; Fri, 22 May 2020 22:41:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="vwSNKYaB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731280AbgEVWla (ORCPT <rfc822;patchwork-linux-spi@patchwork.kernel.org>); Fri, 22 May 2020 18:41:30 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:55446 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731272AbgEVWl2 (ORCPT <rfc822;linux-spi@vger.kernel.org>); Fri, 22 May 2020 18:41:28 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 04MMf55k086262; Fri, 22 May 2020 17:41:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1590187265; bh=d4a8/B8RJ1QRHlItn/FpHiKY2BYYAQOc8eQivs7iF4g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vwSNKYaBtUg7B86bUD/uCiZFEDEKvmh2ZQAvdGddu6veITNb3xaJjLwMhCfbksdzP PB9qB+HIDx8UG/NBL+tYVdzfyK+p+YtlGIaBbTumooIElJTIoxImpdy8RCRknH3vz5 npJ0hMleLABl2COcG1QAAAm2L9gygWhjgzXCs86k= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 04MMf4Jk106202 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 May 2020 17:41:04 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 22 May 2020 17:41:04 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 22 May 2020 17:41:04 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 04MMeh5a044559; Fri, 22 May 2020 17:40:59 -0500 From: Pratyush Yadav <p.yadav@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Nicolas Ferre <nicolas.ferre@microchip.com>, Alexandre Belloni <alexandre.belloni@bootlin.com>, Ludovic Desroches <ludovic.desroches@microchip.com>, Matthias Brugger <matthias.bgg@gmail.com>, Michal Simek <michal.simek@xilinx.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org> CC: Pratyush Yadav <p.yadav@ti.com>, Sekhar Nori <nsekhar@ti.com>, Boris Brezillon <boris.brezillon@collabora.com>, Mason Yang <masonccyang@mxic.com.tw> Subject: [PATCH v8 03/19] spi: atmel-quadspi: reject DTR ops Date: Sat, 23 May 2020 04:10:26 +0530 Message-ID: <20200522224042.29970-4-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200522224042.29970-1-p.yadav@ti.com> References: <20200522224042.29970-1-p.yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: <linux-spi.vger.kernel.org> X-Mailing-List: linux-spi@vger.kernel.org |
Series |
mtd: spi-nor: add xSPI Octal DTR support
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diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index cb44d1e169aa..a898755fb41e 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -285,6 +285,12 @@ static bool atmel_qspi_supports_op(struct spi_mem *mem, op->dummy.nbytes == 0) return false; + /* DTR ops not supported. */ + if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) + return false; + if (op->cmd.nbytes != 1) + return false; + return true; }
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller doesn't support DTR transactions. Since we don't use the default supports_op(), which rejects all DTR ops, do that explicitly in our supports_op(). Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/spi/atmel-quadspi.c | 6 ++++++ 1 file changed, 6 insertions(+)