From patchwork Tue Oct 20 02:32:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ramuthevar,Vadivel MuruganX" X-Patchwork-Id: 11845621 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4750814B7 for ; Tue, 20 Oct 2020 02:32:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 37EF5222E9 for ; Tue, 20 Oct 2020 02:32:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389666AbgJTCcp (ORCPT ); Mon, 19 Oct 2020 22:32:45 -0400 Received: from mga05.intel.com ([192.55.52.43]:49333 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730531AbgJTCco (ORCPT ); Mon, 19 Oct 2020 22:32:44 -0400 IronPort-SDR: V+zPfCYmRT4GHQq+chnWH9Nkx+6R0dUs208P54MsrqeWvVtQC+UyUFUw1sshjKNnuTx4w9/4AL ROysVKZJx77A== X-IronPort-AV: E=McAfee;i="6000,8403,9779"; a="251834483" X-IronPort-AV: E=Sophos;i="5.77,395,1596524400"; d="scan'208";a="251834483" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2020 19:32:42 -0700 IronPort-SDR: /e6B1xahmTV9ipwcq/gnTjGufvIQ5oojeKty+V9lK3lTlUo3kYwPHk39MAmWbiZjL9Zu25xtli iHt1shhWs9rQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,395,1596524400"; d="scan'208";a="422375880" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by fmsmga001.fm.intel.com with ESMTP; 19 Oct 2020 19:32:39 -0700 From: "Ramuthevar,Vadivel MuruganX" To: vigneshr@ti.com, tudor.ambarus@microchip.com, broonie@kernel.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, miquel.raynal@bootlin.com, simon.k.r.goldschmidt@gmail.com, dinguyen@kernel.org, richard@nod.at, cheol.yong.kim@intel.com, qi-ming.wu@intel.com, Ramuthevar Vadivel Murugan Subject: [RESENDPATCH v1 1/6] spi: cadence-quadspi: Add QSPI support for Intel LGM SoC Date: Tue, 20 Oct 2020 10:32:21 +0800 Message-Id: <20201020023226.33559-2-vadivel.muruganx.ramuthevar@linux.intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20201020023226.33559-1-vadivel.muruganx.ramuthevar@linux.intel.com> References: <20201020023226.33559-1-vadivel.muruganx.ramuthevar@linux.intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Ramuthevar Vadivel Murugan Add QSPI controller support for Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan --- drivers/spi/Kconfig | 2 +- drivers/spi/spi-cadence-quadspi.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d2c976e55b8b..926da61eee5a 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -203,7 +203,7 @@ config SPI_CADENCE config SPI_CADENCE_QUADSPI tristate "Cadence Quad SPI controller" - depends on OF && (ARM || ARM64 || COMPILE_TEST) + depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST) help Enable support for the Cadence Quad SPI Flash controller. diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 40938cf3806d..d7b10c46fa70 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1401,6 +1401,9 @@ static const struct of_device_id cqspi_dt_ids[] = { .compatible = "ti,am654-ospi", .data = &am654_ospi, }, + { + .compatible = "intel,lgm-qspi", + }, { /* end of table */ } };