From patchwork Mon Jun 7 10:59:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Lin X-Patchwork-Id: 12303169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A1A1C48BCF for ; Mon, 7 Jun 2021 10:59:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 24DFD61289 for ; Mon, 7 Jun 2021 10:59:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230450AbhFGLBn (ORCPT ); Mon, 7 Jun 2021 07:01:43 -0400 Received: from lucky1.263xmail.com ([211.157.147.131]:48060 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230139AbhFGLBn (ORCPT ); Mon, 7 Jun 2021 07:01:43 -0400 Received: from localhost (unknown [192.168.167.224]) by lucky1.263xmail.com (Postfix) with ESMTP id B5197BA7E4; Mon, 7 Jun 2021 18:59:50 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-SKE-CHECKED: 1 X-ANTISPAM-LEVEL: 2 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P15980T139899277661952S1623063587583133_; Mon, 07 Jun 2021 18:59:50 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <4661d269662baee90cd4d89f83279709> X-RL-SENDER: jon.lin@rock-chips.com X-SENDER: jon.lin@rock-chips.com X-LOGIN-NAME: jon.lin@rock-chips.com X-FST-TO: broonie@kernel.org X-RCPT-COUNT: 9 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: Jon Lin To: broonie@kernel.org Cc: jon.lin@rock-chips.com, heiko@sntech.de, robh+dt@kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v5 6/6] spi: rockchip: Support SPI_CS_HIGH Date: Mon, 7 Jun 2021 18:59:46 +0800 Message-Id: <20210607105946.24266-2-jon.lin@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210607105946.24266-1-jon.lin@rock-chips.com> References: <20210607105802.23796-1-jon.lin@rock-chips.com> <20210607105946.24266-1-jon.lin@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org 1.Add standard spi-cs-high support 2.Refer to spi-controller.yaml for details Signed-off-by: Jon Lin --- Changes in v5: None Changes in v4: None Changes in v3: None drivers/spi/spi-rockchip.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 48b666d42d8a..d64cca34eef7 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -108,6 +108,8 @@ #define CR0_OPM_MASTER 0x0 #define CR0_OPM_SLAVE 0x1 +#define CR0_SOI_OFFSET 23 + #define CR0_MTM_OFFSET 0x21 /* Bit fields in SER, 2bit */ @@ -238,7 +240,7 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) { struct spi_controller *ctlr = spi->controller; struct rockchip_spi *rs = spi_controller_get_devdata(ctlr); - bool cs_asserted = !enable; + bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable; /* Return immediately for no-op */ if (cs_asserted == rs->cs_asserted[spi->chip_select]) @@ -509,6 +511,8 @@ static int rockchip_spi_config(struct rockchip_spi *rs, cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; if (spi->mode & SPI_LSB_FIRST) cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET; + if (spi->mode & SPI_CS_HIGH) + cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET; if (xfer->rx_buf && xfer->tx_buf) cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET; @@ -787,7 +791,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) ctlr->auto_runtime_pm = true; ctlr->bus_num = pdev->id; - ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST; + ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP | SPI_LSB_FIRST | SPI_CS_HIGH; if (slave_mode) { ctlr->mode_bits |= SPI_NO_CS; ctlr->slave_abort = rockchip_spi_slave_abort;