| Message ID | 20210824104041.708945-8-tanureal@opensource.cirrus.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Improve support for AMD SPI controllers | expand |
On Tue, Aug 24, 2021 at 11:40:39AM +0100, Lucas Tanure wrote: > Check if the bus is not in use before starting the transfer > Also wait after so the READ bytes in the FIFO are ready to > be copied This means that we will wait for read to be ready even for write only operations, as opposed to potentially just absorbing the delay while the CPU does other stuff. If we need to wait prior to reading we should do that in the relevant code.
diff --git a/drivers/spi/spi-amd.c b/drivers/spi/spi-amd.c index ebbc64a9fa7b..75390fcb0481 100644 --- a/drivers/spi/spi-amd.c +++ b/drivers/spi/spi-amd.c @@ -110,11 +110,17 @@ static int amd_spi_busy_wait(struct amd_spi *amd_spi) !(val & AMD_SPI_BUSY), 10, 100000); } -static void amd_spi_execute_opcode(struct amd_spi *amd_spi) +static int amd_spi_execute_opcode(struct amd_spi *amd_spi) { + int ret = amd_spi_busy_wait(amd_spi); + + if (ret) + return ret; + /* Set ExecuteOpCode bit in the CTRL0 register */ amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_EXEC_CMD, AMD_SPI_EXEC_CMD); - amd_spi_busy_wait(amd_spi); + + return amd_spi_busy_wait(amd_spi); } static int amd_spi_master_setup(struct spi_device *spi)
Check if the bus is not in use before starting the transfer Also wait after so the READ bytes in the FIFO are ready to be copied Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com> --- drivers/spi/spi-amd.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)