| Message ID | 20211217161654.367782-4-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | External ECC engines & Macronix support | expand |
On 17/12/21 05:16PM, Miquel Raynal wrote: > Controllers can now provide a spi-mem capabilities structure. Let's make > use of it in spi_mem_controller_default_supports_op(). As we want to > check for DTR operations as well as normal operations in a single > helper, let's pull the necessary checks from spi_mem_dtr_supports_op() > for now. > > However, because no controller provide these extra capabilities, this > change has no effect so far. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > --- > drivers/spi/spi-mem.c | 17 +++++++++++++---- > 1 file changed, 13 insertions(+), 4 deletions(-) > > diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c > index c4da0c9b05e9..677e54221ebc 100644 > --- a/drivers/spi/spi-mem.c > +++ b/drivers/spi/spi-mem.c > @@ -173,11 +173,20 @@ EXPORT_SYMBOL_GPL(spi_mem_dtr_supports_op); > bool spi_mem_default_supports_op(struct spi_mem *mem, > const struct spi_mem_op *op) > { > - if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) > - return false; > + struct spi_controller *ctlr = mem->spi->controller; > + bool op_is_dtr = > + op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr; > > - if (op->cmd.nbytes != 1) > - return false; > + if (op_is_dtr) { > + if (!spi_mem_controller_is_capable(ctlr, dtr)) > + return false; > + > + if (op->cmd.dtr && op->cmd.nbytes != 2) > + return false; As I mentioned in patch 1, you want to do this check for all phases. For controllers that do not support mixed DTR modes, this does not allow the controller to make sure those ops are rejected. So that check would have to then move in the controller's supports_op() before spi_mem_default_supports_op() is called. > + } else { > + if (op->cmd.nbytes != 1) > + return false; Technically speaking there is nothing stopping a device from using 2 or 3 or even 4 byte opcodes. But that is a different topic that we don't really need to look at until the need comes up. > + } > > return spi_mem_check_buswidth(mem, op); > } > -- > 2.27.0 >
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index c4da0c9b05e9..677e54221ebc 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -173,11 +173,20 @@ EXPORT_SYMBOL_GPL(spi_mem_dtr_supports_op); bool spi_mem_default_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { - if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) - return false; + struct spi_controller *ctlr = mem->spi->controller; + bool op_is_dtr = + op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr; - if (op->cmd.nbytes != 1) - return false; + if (op_is_dtr) { + if (!spi_mem_controller_is_capable(ctlr, dtr)) + return false; + + if (op->cmd.dtr && op->cmd.nbytes != 2) + return false; + } else { + if (op->cmd.nbytes != 1) + return false; + } return spi_mem_check_buswidth(mem, op); }
Controllers can now provide a spi-mem capabilities structure. Let's make use of it in spi_mem_controller_default_supports_op(). As we want to check for DTR operations as well as normal operations in a single helper, let's pull the necessary checks from spi_mem_dtr_supports_op() for now. However, because no controller provide these extra capabilities, this change has no effect so far. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/spi/spi-mem.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-)