From patchwork Tue Dec 21 17:48:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12690219 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B1C5C4332F for ; Tue, 21 Dec 2021 17:48:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240570AbhLURsx (ORCPT ); Tue, 21 Dec 2021 12:48:53 -0500 Received: from relay12.mail.gandi.net ([217.70.178.232]:33383 "EHLO relay12.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230248AbhLURsw (ORCPT ); Tue, 21 Dec 2021 12:48:52 -0500 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay12.mail.gandi.net (Postfix) with ESMTPSA id 8305C200006; Tue, 21 Dec 2021 17:48:50 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , Cc: Mark Brown , , Julien Su , Jaime Liao , Boris Brezillon , Thomas Petazzoni , Xiangsheng Hou , Miquel Raynal Subject: [PATCH v8 02/14] spi: spi-mem: Introduce a capability structure Date: Tue, 21 Dec 2021 18:48:32 +0100 Message-Id: <20211221174844.56385-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211221174844.56385-1-miquel.raynal@bootlin.com> References: <20211221174844.56385-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Create a spi_controller_mem_caps structure and put it within the spi_controller_mem_ops structure as these are highly related. So far the only field in this structure is the support for dtr operations, but soon we will add another parameter. Also create a helper to parse the capabilities and check if the requested capability has been set or not. Signed-off-by: Miquel Raynal --- include/linux/spi/spi-mem.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 85e2ff7b840d..045ecb7c6f50 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -220,6 +220,17 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem) return mem->drvpriv; } +/** + * struct spi_controller_mem_caps - SPI memory controller capabilities + * @dtr: Supports DTR operations + */ +struct spi_controller_mem_caps { + bool dtr; +}; + +#define spi_mem_controller_is_capable(ctlr, cap) \ + ((ctlr)->mem_ops->caps && (ctlr)->mem_ops->caps->cap) \ + /** * struct spi_controller_mem_ops - SPI memory operations * @adjust_op_size: shrink the data xfer of an operation to match controller's @@ -253,6 +264,7 @@ static inline void *spi_mem_get_drvdata(struct spi_mem *mem) * @poll_status: poll memory device status until (status & mask) == match or * when the timeout has expired. It fills the data buffer with * the last status value. + * @caps: controller capabilities for the handling of the above operations. * * This interface should be implemented by SPI controllers providing an * high-level interface to execute SPI memory operation, which is usually the @@ -283,6 +295,7 @@ struct spi_controller_mem_ops { unsigned long initial_delay_us, unsigned long polling_rate_us, unsigned long timeout_ms); + const struct spi_controller_mem_caps *caps; }; /**