From patchwork Thu Jan 27 09:17:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12726462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E566EC433FE for ; Thu, 27 Jan 2022 09:18:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230114AbiA0JSS (ORCPT ); Thu, 27 Jan 2022 04:18:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232851AbiA0JSR (ORCPT ); Thu, 27 Jan 2022 04:18:17 -0500 Received: from relay11.mail.gandi.net (relay11.mail.gandi.net [IPv6:2001:4b98:dc4:8::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C41FC06173B for ; Thu, 27 Jan 2022 01:18:17 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 4C82C100009; Thu, 27 Jan 2022 09:18:14 +0000 (UTC) From: Miquel Raynal To: Mark Brown , Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Boris Brezillon , Thomas Petazzoni , Julien Su , Jaime Liao , Miquel Raynal Subject: [PATCH v10 02/13] spi: spi-mem: Check the controller extra capabilities Date: Thu, 27 Jan 2022 10:17:57 +0100 Message-Id: <20220127091808.1043392-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220127091808.1043392-1-miquel.raynal@bootlin.com> References: <20220127091808.1043392-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Controllers can now provide a spi-mem capabilities structure. Let's make use of it in spi_mem_controller_default_supports_op(). As we want to check for DTR operations as well as normal operations in a single helper, let's pull the necessary checks from spi_mem_dtr_supports_op() for now. However, because no controller provide these extra capabilities, this change has no effect so far. Signed-off-by: Miquel Raynal Reviewed-by: Pratyush Yadav Reviewed-by: Boris Brezillon Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-3-miquel.raynal@bootlin.com --- drivers/spi/spi-mem.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 37f4443ce9a0..86e6597bc3dc 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -173,11 +173,20 @@ EXPORT_SYMBOL_GPL(spi_mem_dtr_supports_op); bool spi_mem_default_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { - if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) - return false; + struct spi_controller *ctlr = mem->spi->controller; + bool op_is_dtr = + op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr; - if (op->cmd.nbytes != 1) - return false; + if (op_is_dtr) { + if (!spi_mem_controller_is_capable(ctlr, dtr)) + return false; + + if (op->cmd.nbytes != 2) + return false; + } else { + if (op->cmd.nbytes != 1) + return false; + } return spi_mem_check_buswidth(mem, op); }