| Message ID | 20220127091808.1043392-5-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 0e450c7ce7d170a78adaeaa9a430e4184f191c15 |
| Headers | show |
| Series | External ECC engines & Macronix support | expand |
On Thu, 2022-01-27 at 09:17:59 UTC, Miquel Raynal wrote: > This controller has DTR support, so advertize it with a capability now > that the spi-controller structure contains this new field. This will > later be used by the core to discriminate whether an operation is > supported or not, in a more generic way than having different helpers. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> > Link: https://lore.kernel.org/linux-mtd/20220104083631.40776-5-miquel.raynal@bootlin.com Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git spi-mem-ecc. Miquel
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c index 45889947afed..9952fcdf3627 100644 --- a/drivers/spi/spi-mxic.c +++ b/drivers/spi/spi-mxic.c @@ -448,6 +448,10 @@ static const struct spi_controller_mem_ops mxic_spi_mem_ops = { .exec_op = mxic_spi_mem_exec_op, }; +static const struct spi_controller_mem_caps mxic_spi_mem_caps = { + .dtr = true, +}; + static void mxic_spi_set_cs(struct spi_device *spi, bool lvl) { struct mxic_spi *mxic = spi_master_get_devdata(spi->master); @@ -580,6 +584,7 @@ static int mxic_spi_probe(struct platform_device *pdev) master->num_chipselect = 1; master->mem_ops = &mxic_spi_mem_ops; + master->mem_caps = &mxic_spi_mem_caps; master->set_cs = mxic_spi_set_cs; master->transfer_one = mxic_spi_transfer_one;