From patchwork Wed Apr 27 15:34:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Abbott X-Patchwork-Id: 12828976 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78441C433EF for ; Wed, 27 Apr 2022 15:35:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239789AbiD0PiT (ORCPT ); Wed, 27 Apr 2022 11:38:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240098AbiD0PiP (ORCPT ); Wed, 27 Apr 2022 11:38:15 -0400 Received: from smtp96.ord1d.emailsrvr.com (smtp96.ord1d.emailsrvr.com [184.106.54.96]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 380891816D5 for ; Wed, 27 Apr 2022 08:35:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mev.co.uk; s=20190130-41we5z8j; t=1651073700; bh=dFJHFsLRZTyNfS0SkWwtBPTu73T8OM5Iqc9DWInCJ6g=; h=From:To:Subject:Date:From; b=KUCb6ZJehsrOrzmlH3xyAYvvnmu3+72FhzUdsz9xu93xuslFhMwEVmqWdY4AlenwS uAVxHaHZZgGBYf5QTJ3wNjzAVGTK0U15L+MQ64hdgiM9D3cQC9ZKX+nvu41fc4UceX QIXF02MzJwqR5MnBMmwTkyi28hX8INpgAr2wV5iw= X-Auth-ID: abbotti@mev.co.uk Received: by smtp13.relay.ord1d.emailsrvr.com (Authenticated sender: abbotti-AT-mev.co.uk) with ESMTPSA id D6BBCC019D; Wed, 27 Apr 2022 11:34:59 -0400 (EDT) From: Ian Abbott To: linux-spi@vger.kernel.org Cc: Mark Brown , Dinh Nguyen , Pratyush Yadav , linux-kernel@vger.kernel.org, Ian Abbott Subject: [PATCH] spi: cadence-quadspi: fix Direct Access Mode disable for SoCFPGA Date: Wed, 27 Apr 2022 16:34:46 +0100 Message-Id: <20220427153446.10113-1-abbotti@mev.co.uk> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-Classification-ID: be3968db-419c-4c49-af1b-b8e23ba017e0-1-1 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The Cadence QSPI compatible string required for the SoCFPGA platform changed from the default "cdns,qspi-nor" to "intel,socfpga-qspi" with the introduction of an additional quirk in commit 98d948eb8331 ("spi: cadence-quadspi: fix write completion support"). However, that change did not preserve the previously used quirk for this platform. Reinstate the `CQSPI_DISABLE_DAC_MODE` quirk for the SoCFPGA platform. Fixes: 98d948eb8331 ("spi: cadence-quadspi: fix write completion support") Cc: Dinh Nguyen Signed-off-by: Ian Abbott Reviewed-by: Pratyush Yadav --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 41922a5ea1f4..30307392c75a 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1781,7 +1781,7 @@ static const struct cqspi_driver_platdata intel_lgm_qspi = { }; static const struct cqspi_driver_platdata socfpga_qspi = { - .quirks = CQSPI_NO_SUPPORT_WR_COMPLETION, + .quirks = CQSPI_DISABLE_DAC_MODE | CQSPI_NO_SUPPORT_WR_COMPLETION, }; static const struct cqspi_driver_platdata versal_ospi = {