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[v3,2/2] spi: realtek-rtl: Improve readability when clearing the size mask

Message ID 20220731202152.1358252-3-martin.blumenstingl@googlemail.com (mailing list archive)
State New, archived
Headers show
Series spi: realtek-rtl: two small improvements | expand

Commit Message

Martin Blumenstingl July 31, 2022, 8:21 p.m. UTC 
Define the bitmask RTL_SPI_SFCSR_LEN_MASK so it only sets the bits of
this specific part of the register instead of setting all bits except
the relevant ones. This makes it consistent with single bit macros in
the spi-realtek-rtl driver as well as with the approach that many other
drivers use.

Suggested-by: Sander Vanheule <sander@svanheule.net>
Tested-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/spi/spi-realtek-rtl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/spi/spi-realtek-rtl.c b/drivers/spi/spi-realtek-rtl.c
index 866b0477dbd7..0371d44cbfbd 100644
--- a/drivers/spi/spi-realtek-rtl.c
+++ b/drivers/spi/spi-realtek-rtl.c
@@ -20,7 +20,7 @@  struct rtspi {
 #define RTL_SPI_SFCSR_CSB1		BIT(30)
 #define RTL_SPI_SFCSR_RDY		BIT(27)
 #define RTL_SPI_SFCSR_CS		BIT(24)
-#define RTL_SPI_SFCSR_LEN_MASK		~(0x03 << 28)
+#define RTL_SPI_SFCSR_LEN_MASK		(0x03 << 28)
 #define RTL_SPI_SFCSR_LEN1		(0x00 << 28)
 #define RTL_SPI_SFCSR_LEN4		(0x03 << 28)
 
@@ -49,7 +49,7 @@  static void set_size(struct rtspi *rtspi, int size)
 	u32 value;
 
 	value = readl(REG(RTL_SPI_SFCSR));
-	value &= RTL_SPI_SFCSR_LEN_MASK;
+	value &= ~RTL_SPI_SFCSR_LEN_MASK;
 	if (size == 4)
 		value |= RTL_SPI_SFCSR_LEN4;
 	else if (size == 1)