diff mbox series

[v10,1/5] spi: dw: Add 32 bpw support to SPI DW DMA driver

Message ID 20230509082244.1069623-2-joychakr@google.com (mailing list archive)
State Superseded
Headers show
Series spi: dw: DW SPI DMA Driver updates | expand

Commit Message

Joy Chakraborty May 9, 2023, 8:22 a.m. UTC
Add Support for AxSize = 4 bytes configuration from dw dma driver if
n_bytes i.e. number of bytes per write to fifo is 4.

Number of bytes written to fifo per write is depended on the bits/word
configuration being used which the DW core driver translates to n_bytes.
Hence, for bits per word values between 17 and 32 n_bytes should be
equal to 4.

Signed-off-by: Joy Chakraborty <joychakr@google.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
* tested on Baikal-T1 based system with DW SPI-looped back interface
transferring a chunk of data with DFS:8,12,16.
---
 drivers/spi/spi-dw-dma.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

Mark Brown May 11, 2023, 1:29 a.m. UTC | #1
On Tue, May 09, 2023 at 08:22:40AM +0000, Joy Chakraborty wrote:
> Add Support for AxSize = 4 bytes configuration from dw dma driver if
> n_bytes i.e. number of bytes per write to fifo is 4.

This doesn't apply against current code, please check and resend.
Joy Chakraborty May 11, 2023, 9:32 a.m. UTC | #2
On Thu, May 11, 2023 at 6:59 AM Mark Brown <broonie@kernel.org> wrote:
>
> On Tue, May 09, 2023 at 08:22:40AM +0000, Joy Chakraborty wrote:
> > Add Support for AxSize = 4 bytes configuration from dw dma driver if
> > n_bytes i.e. number of bytes per write to fifo is 4.
>
> This doesn't apply against current code, please check and resend.

Hello Mark,

This patch seems to be applied already as per the reply to the cover letter:

[1/5] spi: dw: Add 32 bpw support to SPI DW DMA driver
      commit: 5147d5bfddc807e990a762aed0e56724afeda663
[2/5] spi: dw: Move dw_spi_can_dma()
      commit: d2ae5d42464e990b4d26734c180fbff64233992c
[3/5] spi: dw: Add DMA directional capability check
      (no commit info)
[4/5] spi: dw: Add DMA address widths capability check
      (no commit info)
[5/5] spi: dw: Round of n_bytes to power of 2
      (no commit info)

Whereas [3/5] to [5/5] has not been applied.

Do I need to rebase and send the whole series again or resend the last
3 patches based on
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git ?

Thanks
Joy
Mark Brown May 12, 2023, 1:13 a.m. UTC | #3
On Thu, May 11, 2023 at 03:02:00PM +0530, Joy Chakraborty wrote:

> This patch seems to be applied already as per the reply to the cover letter:
> 
> [1/5] spi: dw: Add 32 bpw support to SPI DW DMA driver
>       commit: 5147d5bfddc807e990a762aed0e56724afeda663
> [2/5] spi: dw: Move dw_spi_can_dma()
>       commit: d2ae5d42464e990b4d26734c180fbff64233992c
> [3/5] spi: dw: Add DMA directional capability check
>       (no commit info)
> [4/5] spi: dw: Add DMA address widths capability check
>       (no commit info)
> [5/5] spi: dw: Round of n_bytes to power of 2
>       (no commit info)

> Whereas [3/5] to [5/5] has not been applied.

> Do I need to rebase and send the whole series again or resend the last
> 3 patches based on
> https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git ?

You need to resend the last three patches, I probably just picked the
wrong one to reply to.
diff mbox series

Patch

diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c
index ababb910b391..c1b42cb59965 100644
--- a/drivers/spi/spi-dw-dma.c
+++ b/drivers/spi/spi-dw-dma.c
@@ -208,12 +208,16 @@  static bool dw_spi_can_dma(struct spi_controller *master,
 
 static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes)
 {
-	if (n_bytes == 1)
+	switch (n_bytes) {
+	case 1:
 		return DMA_SLAVE_BUSWIDTH_1_BYTE;
-	else if (n_bytes == 2)
+	case 2:
 		return DMA_SLAVE_BUSWIDTH_2_BYTES;
-
-	return DMA_SLAVE_BUSWIDTH_UNDEFINED;
+	case 4:
+		return DMA_SLAVE_BUSWIDTH_4_BYTES;
+	default:
+		return DMA_SLAVE_BUSWIDTH_UNDEFINED;
+	}
 }
 
 static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed)