| Message ID | 20240508-fox-unpiloted-b97e1535627b@spud (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | ef13561d2b163ac0ae6befa53bca58a26dc3320b |
| Headers | show |
| Series | [v1] spi: microchip-core-qspi: fix setting spi bus clock rate | expand |
On 5/8/24 16:46, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Before ORing the new clock rate with the control register value read > from the hardware, the existing clock rate needs to be masked off as > otherwise the existing value will interfere with the new one. > > CC: stable@vger.kernel.org > Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> > --- > CC: Conor Dooley <conor.dooley@microchip.com> > CC: Daire McNamara <daire.mcnamara@microchip.com> > CC: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com> > CC: Mark Brown <broonie@kernel.org> > CC: linux-spi@vger.kernel.org > CC: linux-kernel@vger.kernel.org > --- > drivers/spi/spi-microchip-core-qspi.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c > index 03d125a71fd9..09f16471c537 100644 > --- a/drivers/spi/spi-microchip-core-qspi.c > +++ b/drivers/spi/spi-microchip-core-qspi.c > @@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi > } > > control = readl_relaxed(qspi->regs + REG_CONTROL); > + control &= ~CONTROL_CLKRATE_MASK; > control |= baud_rate_val << CONTROL_CLKRATE_SHIFT; > writel_relaxed(control, qspi->regs + REG_CONTROL); > control = readl_relaxed(qspi->regs + REG_CONTROL);
On Wed, 08 May 2024 16:46:51 +0100, Conor Dooley wrote: > Before ORing the new clock rate with the control register value read > from the hardware, the existing clock rate needs to be masked off as > otherwise the existing value will interfere with the new one. > > Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/1] spi: microchip-core-qspi: fix setting spi bus clock rate commit: ef13561d2b163ac0ae6befa53bca58a26dc3320b All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c index 03d125a71fd9..09f16471c537 100644 --- a/drivers/spi/spi-microchip-core-qspi.c +++ b/drivers/spi/spi-microchip-core-qspi.c @@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi } control = readl_relaxed(qspi->regs + REG_CONTROL); + control &= ~CONTROL_CLKRATE_MASK; control |= baud_rate_val << CONTROL_CLKRATE_SHIFT; writel_relaxed(control, qspi->regs + REG_CONTROL); control = readl_relaxed(qspi->regs + REG_CONTROL);