From patchwork Wed Jun 5 21:22:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 13687545 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F00715FA97; Wed, 5 Jun 2024 21:23:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717622621; cv=none; b=t82eKomG+TaUK62czPMrFpnnxwYLQEX4psrI64rb+Ld7mdLrbKItBYEr99jcUZmJQ2Fl5AsDBYqcmeXJ2OTGLSrxut6sgEuflqBAkhNqedaL4aIj/pSu1ggwqCRjZX0RV0WGzXNZbtVe0Uel50NLLkjf0rrvzJW0znkGP53OwzQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717622621; c=relaxed/simple; bh=4ZjZj3THCOKVgY6viW7Cea0T7GWn/8Z7ggQPNe7qU2s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=FniHr3s/Jgq3fSMxO3NV2DDLAmuuPZCJEu67qYQDs5MdaAfhQR95Bm19uLxv9nPaiUFhe0Ep/ymwUskxKOINOnVXTD2EMs4t4vIKsZSUerg6IZHBpRou3Zkk7lB8jRWLKA/MUkj6EwnfBZ+hJ7WYrBrMtGqkTLZYhsJcmlCrvRI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; spf=pass smtp.mailfrom=linux.ibm.com; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b=CAPpPLi4; arc=none smtp.client-ip=148.163.158.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="CAPpPLi4" Received: from pps.filterd (m0353724.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 455L22RL000949; Wed, 5 Jun 2024 21:23:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc : content-transfer-encoding : date : from : in-reply-to : message-id : mime-version : references : subject : to; s=pp1; bh=35QhAQ7kX9QHCSy8fxK00Ig3Cr+S1lp5g6DIkdhYmNw=; b=CAPpPLi4bVRRGc//GeterL+0O98Y3jyYLFp6r0c6dCG6SdxJfZxHVW+ZemHNDydGjV/M 4j1K7LHAKhuYLktvbmxz7okeFTRSNRYiIlVULjbqGEmVaZwoOgHUzpBSDE0IU/p0WHSw O8J2dfE1+Wh53Hq1AwpiHgWBKMT16+fkwKqP9+O3qBh9bJg5i6CDJ0ajLQmdiK8iu1f0 K14upxagk3g9wEiB4k9OWFEQXQrRyCqXk65UZ57yTBiQXLv4YeZviw2TSEh370MTjCoN IfyRWvwbxZ6tALzfsC3OceELQgqpZCwi6e0LStany7AUMLmoSewZ6HmdrlYabuvKNgIS fw== Received: from ppma22.wdc07v.mail.ibm.com (5c.69.3da9.ip4.static.sl-reverse.com [169.61.105.92]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3yjxbg09vm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 05 Jun 2024 21:23:21 +0000 Received: from pps.filterd (ppma22.wdc07v.mail.ibm.com [127.0.0.1]) by ppma22.wdc07v.mail.ibm.com (8.17.1.19/8.17.1.19) with ESMTP id 455IX4mD008479; Wed, 5 Jun 2024 21:23:20 GMT Received: from smtprelay02.dal12v.mail.ibm.com ([172.16.1.4]) by ppma22.wdc07v.mail.ibm.com (PPS) with ESMTPS id 3ygec0xv56-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 05 Jun 2024 21:23:20 +0000 Received: from smtpav06.dal12v.mail.ibm.com (smtpav06.dal12v.mail.ibm.com [10.241.53.105]) by smtprelay02.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 455LNHeq26215124 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 5 Jun 2024 21:23:19 GMT Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC0F95805E; Wed, 5 Jun 2024 21:23:15 +0000 (GMT) Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9DC5158068; Wed, 5 Jun 2024 21:23:15 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.121.242]) by smtpav06.dal12v.mail.ibm.com (Postfix) with ESMTP; Wed, 5 Jun 2024 21:23:15 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: eajames@linux.ibm.com, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, joel@jms.id.au, alistair@popple.id.au, jk@ozlabs.org, andrew@codeconstruct.com.au, linux-aspeed@lists.ozlabs.org, ninad@linux.ibm.com, lakshmiy@us.ibm.com Subject: [PATCH v4 08/40] fsi: core: Reset errors instead of clearing interrupts Date: Wed, 5 Jun 2024 16:22:40 -0500 Message-Id: <20240605212312.349188-9-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240605212312.349188-1-eajames@linux.ibm.com> References: <20240605212312.349188-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 4jj5RR4L9-1uNJtIYpjzprPcMIaCAcXq X-Proofpoint-ORIG-GUID: 4jj5RR4L9-1uNJtIYpjzprPcMIaCAcXq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-05_02,2024-06-05_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 malwarescore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 mlxscore=0 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406050160 The proper way to clear error conditions is to use the SRES register rather than simple clearing SISC. Signed-off-by: Eddie James --- drivers/fsi/fsi-core.c | 9 +++++---- drivers/fsi/fsi-slave.h | 6 ++++++ 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c index 93bbdcf50a89a..ce9762d1bd8b0 100644 --- a/drivers/fsi/fsi-core.c +++ b/drivers/fsi/fsi-core.c @@ -166,7 +166,7 @@ static int fsi_slave_calc_addr(struct fsi_slave *slave, uint32_t *addrp, static int fsi_slave_report_and_clear_errors(struct fsi_slave *slave) { struct fsi_master *master = slave->master; - __be32 irq, stat; + __be32 irq, reset, stat; int rc, link; uint8_t id; @@ -187,9 +187,10 @@ static int fsi_slave_report_and_clear_errors(struct fsi_slave *slave) be32_to_cpu(stat), be32_to_cpu(irq)); trace_fsi_slave_error(slave, be32_to_cpu(irq), be32_to_cpu(stat)); - /* clear interrupts */ - return fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SISC, - &irq, sizeof(irq)); + /* reset errors */ + reset = cpu_to_be32(FSI_SRES_ERRS); + return fsi_master_write(master, link, id, FSI_SLAVE_BASE + FSI_SRES, &reset, + sizeof(reset)); } /* Encode slave local bus echo delay */ diff --git a/drivers/fsi/fsi-slave.h b/drivers/fsi/fsi-slave.h index fabc0b66d5bf3..e9fd4be6f3760 100644 --- a/drivers/fsi/fsi-slave.h +++ b/drivers/fsi/fsi-slave.h @@ -24,6 +24,7 @@ #define FSI_SSI1M 0x1c /* S : Set slave interrupt 1 mask */ #define FSI_SCI1M 0x20 /* C : Clear slave interrupt 1 mask */ #define FSI_SLBUS 0x30 /* W : LBUS Ownership */ +#define FSI_SRES 0x34 /* W : Reset */ #define FSI_SRSIC0 0x68 /* C : Clear remote interrupt condition */ #define FSI_SRSIC4 0x6c /* C : Clear remote interrupt condition */ #define FSI_SRSIM0 0x70 /* R/W: Remote interrupt mask */ @@ -90,6 +91,11 @@ */ #define FSI_SLBUS_FORCE 0x80000000 /* Force LBUS ownership */ +/* + * SRES fields + */ +#define FSI_SRES_ERRS 0x40000000 /* Reset FSI slave errors */ + /* * LLMODE fields */