From patchwork Tue Jul 9 22:12:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Witold Sadowski X-Patchwork-Id: 13728594 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7AB3413AD07; Tue, 9 Jul 2024 22:12:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.156.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720563142; cv=none; b=BeSa8tXAJWIUeDab6ZqbmuPWw/CYOd0UitfZ2XYz2LWuB9lz2VzeJNFMfHfYVsa/eGrG+ofp8CEFQFdQ1IYm4zb9VJwA+YyZOFdc4wzRTF1rrYs5lzsb3Xil+QQrEyUSnKG0mBLuhBg1UXjZyL+J66Pwge77H6qsa53Re48RYgM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720563142; c=relaxed/simple; bh=cHicvuNsB6FBsP+p24Oei7cf3LE105dI1jDELbVa/L8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sOExJkTaDiQ/s8XVjjpoRlrqIp+DbKo07k3x08fXSHzepUs0yKDTTdtzF95blgYh8fNDt0VH7sU3yPPd27OaNWnHPXWi35mK9DoGrEAvRdWwo7FHKH3xi/12TNifwqWQXRXSxMHNSTBcIorBWcRAR8C3CttIQYISCHFPZsopltw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com; spf=pass smtp.mailfrom=marvell.com; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b=hmFWTncu; arc=none smtp.client-ip=67.231.156.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=marvell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=marvell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=marvell.com header.i=@marvell.com header.b="hmFWTncu" Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 469KH3Lj020309; Tue, 9 Jul 2024 15:12:16 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=q HWv3FV88gHLyPrpIGGB1AAf2zkoSjgvgaCyZbzsiAY=; b=hmFWTncuJVn/Cs0Qc 7gIoryzsn59r5wEBbATyWh6PQBJlyIvczkuZp8p4Ug4cj0qTWV+8j7c83a5J39QL rICG7Nmz53fK/FYyG7uuuUYdzZGEHJuqV1pWfP/xk6J49xzf3WiXex3LbxcA7O7n GiDFNBJoS8lL44ghjrO8sxi9rIzn3oHHu7DNg06Y9XK9WySU4mcuzVgXWyf9Hhvl slCi0YYoT2yIbkjkeRZ7b3UCCeTlc7GDbK+HBgQSr5A+t2m8KrXZy5flVfxnoKie K/T+OU60OTLxGba6aGnbVXoHsoP8dAMIR7ZyVzDeSrsc0Sj0SaiLTJx6ZZL4zExW 8BQ/g== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 408ntymyxg-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 09 Jul 2024 15:12:15 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 9 Jul 2024 15:12:15 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Tue, 9 Jul 2024 15:12:15 -0700 Received: from Dell2s-9.sclab.marvell.com (unknown [10.110.150.250]) by maili.marvell.com (Postfix) with ESMTP id B31BF3F707B; Tue, 9 Jul 2024 15:12:14 -0700 (PDT) From: Witold Sadowski To: , , CC: , , , , , Witold Sadowski , "Krzysztof Kozlowski" Subject: [PATCH v10 1/9] spi: dt-bindings: cadence: Add Marvell overlay bindings documentation for Cadence XSPI Date: Tue, 9 Jul 2024 15:12:03 -0700 Message-ID: <20240709221211.2130456-2-wsadowski@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240709221211.2130456-1-wsadowski@marvell.com> References: <20240709221211.2130456-1-wsadowski@marvell.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: pR9al3PkR-DLThtypChtTIF6XtP_XBi7 X-Proofpoint-GUID: pR9al3PkR-DLThtypChtTIF6XtP_XBi7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-09_10,2024-07-09_01,2024-05-17_01 Add new bindings for the v2 Marvell xSPI overlay: marvell,cn10-xspi-nor compatible string. This new compatible string distinguishes between the original and modified xSPI block. Also add an optional base for the xfer register set with an additional reg field to allocate the xSPI Marvell overlay XFER block. Signed-off-by: Witold Sadowski Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/spi/cdns,xspi.yaml | 32 ++++++++++++++++--- 1 file changed, 28 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/cdns,xspi.yaml b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml index eb0f92468185..38a5795589de 100644 --- a/Documentation/devicetree/bindings/spi/cdns,xspi.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml @@ -15,24 +15,27 @@ description: | single, dual, quad or octal wire transmission modes for read/write access to slaves such as SPI-NOR flash. -allOf: - - $ref: spi-controller.yaml# - properties: compatible: - const: cdns,xspi-nor + enum: + - cdns,xspi-nor + - marvell,cn10-xspi-nor reg: items: - description: address and length of the controller register set - description: address and length of the Slave DMA data port - description: address and length of the auxiliary registers + - description: address and length of the xfer registers + minItems: 3 reg-names: items: - const: io - const: sdma - const: aux + - const: xfer + minItems: 3 interrupts: maxItems: 1 @@ -42,6 +45,27 @@ required: - reg - interrupts +allOf: + - $ref: spi-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - marvell,cn10-xspi-nor + then: + properties: + reg: + minItems: 4 + reg-names: + minItems: 4 + else: + properties: + reg: + maxItems: 3 + reg-names: + maxItems: 3 + unevaluatedProperties: false examples: