From patchwork Wed Sep 9 13:24:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyrille Pitchen X-Patchwork-Id: 7146541 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DA911BEEC1 for ; Wed, 9 Sep 2015 13:26:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2E6C32087C for ; Wed, 9 Sep 2015 13:26:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4AED22098A for ; Wed, 9 Sep 2015 13:26:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754800AbbIIN04 (ORCPT ); Wed, 9 Sep 2015 09:26:56 -0400 Received: from eusmtp01.atmel.com ([212.144.249.243]:33258 "EHLO eusmtp01.atmel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754395AbbIIN0Q (ORCPT ); Wed, 9 Sep 2015 09:26:16 -0400 Received: from tenerife.corp.atmel.com (10.161.101.13) by eusmtp01.atmel.com (10.161.101.31) with Microsoft SMTP Server id 14.3.235.1; Wed, 9 Sep 2015 15:26:11 +0200 From: Cyrille Pitchen To: , , , , , , , , , CC: , , , , , , , , , Cyrille Pitchen Subject: [PATCH linux-next v6 5/8] Documentation: mtd: add a DT property to set the number of dummy cycles Date: Wed, 9 Sep 2015 15:24:15 +0200 Message-ID: <3eea24f2102a0ba12135ae2d03499a72e74f4818.1441803609.git.cyrille.pitchen@atmel.com> X-Mailer: git-send-email 1.8.2.2 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Depending on the SPI clock frequency, the Fast Read op code and the Single/Dual Data Rate mode, the number of dummy cycles can be tuned to improve transfer speed. The actual number of dummy cycles is specific for each memory model and is provided by the manufacturer thanks to the memory datasheet. Signed-off-by: Cyrille Pitchen --- Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt index 2bee68103b01..4387567d8024 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt @@ -19,6 +19,11 @@ Optional properties: all chips and support for it can not be detected at runtime. Refer to your chips' datasheet to check if this is supported by your chip. +- m25p,num-dummy-cycles : Set the number of dummy cycles for Fast Read commands. + Depending on the manufacturer additional dedicated + commands are sent to the flash memory so the + controller and the memory can agree on the number of + dummy cycles to use. Example: @@ -29,4 +34,5 @@ Example: reg = <0>; spi-max-frequency = <40000000>; m25p,fast-read; + m25p,num-dummy-cycles = <8>; };