diff mbox

spi: Enable Cadence SPI driver for ARM64

Message ID 859f9c4d3fbbc5153d924d7a6e36aa3a734e1b16.1424763838.git.michal.simek@xilinx.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michal Simek Feb. 24, 2015, 7:44 a.m. UTC 
This driver is used on new Xilinx ZynqMP SoC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
---

 drivers/spi/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Mark Brown Feb. 24, 2015, 8:08 a.m. UTC | #1 
On Tue, Feb 24, 2015 at 08:44:01AM +0100, Michal Simek wrote:
> This driver is used on new Xilinx ZynqMP SoC.

Why does this have an architecture dependence at all?
Michal Simek Feb. 24, 2015, 8:23 a.m. UTC | #2 
On 02/24/2015 09:08 AM, Mark Brown wrote:
> On Tue, Feb 24, 2015 at 08:44:01AM +0100, Michal Simek wrote:
>> This driver is used on new Xilinx ZynqMP SoC.
> 
> Why does this have an architecture dependence at all?

Let me push this to my repo and run Fenguang's system on it if there
is any build error on others architectures.
I expect that this could be sufficient test, right?

Thanks,
Michal
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Mark Brown Feb. 24, 2015, 1:22 p.m. UTC | #3 
On Tue, Feb 24, 2015 at 09:23:29AM +0100, Michal Simek wrote:
> On 02/24/2015 09:08 AM, Mark Brown wrote:
> > On Tue, Feb 24, 2015 at 08:44:01AM +0100, Michal Simek wrote:
> >> This driver is used on new Xilinx ZynqMP SoC.

> > Why does this have an architecture dependence at all?

> Let me push this to my repo and run Fenguang's system on it if there
> is any build error on others architectures.
> I expect that this could be sufficient test, right?

Probably, yes.
diff mbox

Patch

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index ab8dfbef6f1b..fec97a479433 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -159,7 +159,7 @@  config SPI_BUTTERFLY
 
 config SPI_CADENCE
 	tristate "Cadence SPI controller"
-	depends on ARM
+	depends on ARM || ARM64
 	help
 	  This selects the Cadence SPI controller master driver
 	  used by Xilinx Zynq.