From patchwork Wed Nov 30 18:08:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 9454675 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0A3B160585 for ; Wed, 30 Nov 2016 18:08:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 046FA2848E for ; Wed, 30 Nov 2016 18:08:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ED6C42849A; Wed, 30 Nov 2016 18:08:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B61228497 for ; Wed, 30 Nov 2016 18:08:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758540AbcK3SIT (ORCPT ); Wed, 30 Nov 2016 13:08:19 -0500 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:36098 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758552AbcK3SIO (ORCPT ); Wed, 30 Nov 2016 13:08:14 -0500 Received: from [2001:470:1f1d:6b5::3] (helo=debutante) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2) (envelope-from ) id 1cC9Ig-0005lS-3o; Wed, 30 Nov 2016 18:08:12 +0000 Received: from broonie by debutante with local (Exim 4.87) (envelope-from ) id 1cC9Id-0008Qe-EJ; Wed, 30 Nov 2016 18:08:07 +0000 From: Mark Brown To: Gao Pan Cc: Mark Brown , broonie@kernel.org, linux-spi@vger.kernel.org, pandy.gao@nxp.com, frank.li@nxp.com, fugang.duan@nxp.com In-Reply-To: <1480302180-15550-2-git-send-email-pandy.gao@nxp.com> Message-Id: Date: Wed, 30 Nov 2016 18:08:07 +0000 X-SA-Exim-Connect-IP: 2001:470:1f1d:6b5::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Applied "spi: fsl-lpspi: read lpspi tx/rx fifo size in probe()" to the spi tree X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: No (on mezzanine.sirena.org.uk); Unknown failure Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: fsl-lpspi: read lpspi tx/rx fifo size in probe() has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From b88a0deaaf97e394aa63818486b16dbc37273d6d Mon Sep 17 00:00:00 2001 From: Gao Pan Date: Mon, 28 Nov 2016 11:03:00 +0800 Subject: [PATCH] spi: fsl-lpspi: read lpspi tx/rx fifo size in probe() The lpspi tx/rx fifo size is a read only parameter resides lpspi Parameter Register. It's better to read lpspi tx/rx fifo size in probe(). Signed-off-by: Gao Pan Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-lpspi.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 47a97add0639..71eca6e3fe32 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -236,15 +236,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi, static void fsl_lpspi_set_watermark(struct fsl_lpspi_data *fsl_lpspi) { - u8 txwatermark, rxwatermark; u32 temp; - temp = readl(fsl_lpspi->base + IMX7ULP_PARAM); - fsl_lpspi->txfifosize = 1 << (temp & 0x0f); - fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f); - rxwatermark = fsl_lpspi->txfifosize >> 1; - txwatermark = fsl_lpspi->rxfifosize >> 1; - temp = txwatermark | rxwatermark << 16; + temp = fsl_lpspi->txfifosize >> 1 | (fsl_lpspi->rxfifosize >> 1) << 16; writel(temp, fsl_lpspi->base + IMX7ULP_FCR); @@ -427,6 +421,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev) struct spi_master *master; struct resource *res; int ret, irq; + u32 temp; master = spi_alloc_master(&pdev->dev, sizeof(struct fsl_lpspi_data)); if (!master) @@ -476,6 +471,18 @@ static int fsl_lpspi_probe(struct platform_device *pdev) goto out_master_put; } + ret = clk_prepare_enable(fsl_lpspi->clk); + if (ret) { + dev_err(&pdev->dev, "can't enable lpspi clock, ret=%d\n", ret); + goto out_master_put; + } + + temp = readl(fsl_lpspi->base + IMX7ULP_PARAM); + fsl_lpspi->txfifosize = 1 << (temp & 0x0f); + fsl_lpspi->rxfifosize = 1 << ((temp >> 8) & 0x0f); + + clk_disable_unprepare(fsl_lpspi->clk); + ret = devm_spi_register_master(&pdev->dev, master); if (ret < 0) { dev_err(&pdev->dev, "spi_register_master error.\n");