| Message ID | a6f372bbd6fd45e5ef98a35e175388eb5e3b08b5.1551971833.git.jan.kundrat@cesnet.cz (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | inter-word delays for spidev and spi-orion | expand |
On Thu, Mar 07, 2019 at 03:43:56PM +0100, Jan Kundrát wrote: > That commit only made sense when there were more per-child options such > as per-slave interword delay, perhaps obtained via DT. That never > happened. Instead, the inter-word delay feature got implemented during > the 5.1 cycle, but it works on a per-transfer basis rather than > per-child. This means that it is quite likely that we won't be stashing > more per-child options in that struct, and I can clean up after myself. > Sorry for noise. > > This reverts commit 5c22af7eeb265413b80eb8e03ae708e1b222728c. > --- > drivers/spi/spi-orion.c | 18 +++++++----------- This is missing a signed-off-by.
On čtvrtek 7. března 2019 15:43:56 CET, Jan Kundrát wrote: > That commit only made sense when there were more per-child options such > as per-slave interword delay, perhaps obtained via DT. That never > happened. Instead, the inter-word delay feature got implemented during > the 5.1 cycle, but it works on a per-transfer basis rather than > per-child. This means that it is quite likely that we won't be stashing > more per-child options in that struct, and I can clean up after myself. > Sorry for noise. > > This reverts commit 5c22af7eeb265413b80eb8e03ae708e1b222728c. > --- > drivers/spi/spi-orion.c | 18 +++++++----------- > 1 file changed, 7 insertions(+), 11 deletions(-) > > diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c > index eb70a9dc31ac..7d2e9bcc8b30 100644 > --- a/drivers/spi/spi-orion.c > +++ b/drivers/spi/spi-orion.c > @@ -91,10 +91,6 @@ struct orion_direct_acc { > u32 size; > }; > > -struct orion_child_options { > - struct orion_direct_acc direct_access; > -}; > - > struct orion_spi { > struct spi_master *master; > void __iomem *base; > @@ -103,7 +99,7 @@ struct orion_spi { > const struct orion_spi_dev *devdata; > int unused_hw_gpio; > > - struct orion_child_options child[ORION_NUM_CHIPSELECTS]; > + struct orion_direct_acc direct_access[ORION_NUM_CHIPSELECTS]; > }; > > static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg) > @@ -442,7 +438,7 @@ orion_spi_write_read(struct spi_device > *spi, struct spi_transfer *xfer) > * Use SPI direct write mode if base address is available. Otherwise > * fall back to PIO mode for this transfer. > */ > - vaddr = orion_spi->child[cs].direct_access.vaddr; > + vaddr = orion_spi->direct_access[cs].vaddr; > > if (vaddr && xfer->tx_buf && word_len == 8) { > unsigned int cnt = count / 4; > @@ -687,7 +683,6 @@ static int orion_spi_probe(struct platform_device *pdev) > } > > for_each_available_child_of_node(pdev->dev.of_node, np) { > - struct orion_direct_acc *dir_acc; > u32 cs; > int cs_gpio; > > @@ -755,13 +750,14 @@ static int orion_spi_probe(struct > platform_device *pdev) > * This needs to get extended for the direct SPI-NOR / SPI-NAND > * support, once this gets implemented. > */ > - dir_acc = &spi->child[cs].direct_access; > - dir_acc->vaddr = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE); > - if (!dir_acc->vaddr) { > + spi->direct_access[cs].vaddr = devm_ioremap(&pdev->dev, > + r->start, > + PAGE_SIZE); > + if (!spi->direct_access[cs].vaddr) { > status = -ENOMEM; > goto out_rel_axi_clk; > } > - dir_acc->size = PAGE_SIZE; > + spi->direct_access[cs].size = PAGE_SIZE; > > dev_info(&pdev->dev, "CS%d configured for direct access\n", cs); > } Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Sorry for not including this tag. If this is not enough, I'll resend. With kind regards, Jan
diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index eb70a9dc31ac..7d2e9bcc8b30 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -91,10 +91,6 @@ struct orion_direct_acc { u32 size; }; -struct orion_child_options { - struct orion_direct_acc direct_access; -}; - struct orion_spi { struct spi_master *master; void __iomem *base; @@ -103,7 +99,7 @@ struct orion_spi { const struct orion_spi_dev *devdata; int unused_hw_gpio; - struct orion_child_options child[ORION_NUM_CHIPSELECTS]; + struct orion_direct_acc direct_access[ORION_NUM_CHIPSELECTS]; }; static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg) @@ -442,7 +438,7 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) * Use SPI direct write mode if base address is available. Otherwise * fall back to PIO mode for this transfer. */ - vaddr = orion_spi->child[cs].direct_access.vaddr; + vaddr = orion_spi->direct_access[cs].vaddr; if (vaddr && xfer->tx_buf && word_len == 8) { unsigned int cnt = count / 4; @@ -687,7 +683,6 @@ static int orion_spi_probe(struct platform_device *pdev) } for_each_available_child_of_node(pdev->dev.of_node, np) { - struct orion_direct_acc *dir_acc; u32 cs; int cs_gpio; @@ -755,13 +750,14 @@ static int orion_spi_probe(struct platform_device *pdev) * This needs to get extended for the direct SPI-NOR / SPI-NAND * support, once this gets implemented. */ - dir_acc = &spi->child[cs].direct_access; - dir_acc->vaddr = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE); - if (!dir_acc->vaddr) { + spi->direct_access[cs].vaddr = devm_ioremap(&pdev->dev, + r->start, + PAGE_SIZE); + if (!spi->direct_access[cs].vaddr) { status = -ENOMEM; goto out_rel_axi_clk; } - dir_acc->size = PAGE_SIZE; + spi->direct_access[cs].size = PAGE_SIZE; dev_info(&pdev->dev, "CS%d configured for direct access\n", cs); }