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[78.236.204.66]) by smtp.gmail.com with ESMTPSA id 202sm10488911wmw.5.2016.04.13.12.56.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Apr 2016 12:56:09 -0700 (PDT) From: Christophe Ricard X-Google-Original-From: Christophe Ricard To: jarkko.sakkinen@linux.intel.com Date: Wed, 13 Apr 2016 21:55:46 +0200 Message-Id: <1460577351-24632-8-git-send-email-christophe-h.ricard@st.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1460577351-24632-1-git-send-email-christophe-h.ricard@st.com> References: <1460577351-24632-1-git-send-email-christophe-h.ricard@st.com> X-Spam-Score: -1.6 (-) X-Headers-End: 1aqQtc-0002hm-Vg Cc: jean-luc.blanc@st.com, ashley@ashleylai.com, tpmdd-devel@lists.sourceforge.net, christophe-h.ricard@st.com, benoit.houyere@st.com Subject: [tpmdd-devel] [PATCH v2 07/12] tpm: tpm_tis: Add post_probe phy handler X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: tpmdd-devel-bounces@lists.sourceforge.net X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,HK_RANDOM_ENVFROM,RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add post_probe phy handler in order to execute additional proprietary operations after tpm2_probe. For the case of tpm_tis using LPC, itpm workaround probing. Signed-off-by: Christophe Ricard --- drivers/char/tpm/tpm_tis.c | 29 +++++++++++++++++++++-------- drivers/char/tpm/tpm_tis_core.h | 1 + 2 files changed, 22 insertions(+), 8 deletions(-) diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c index a641af0..a82a09f 100644 --- a/drivers/char/tpm/tpm_tis.c +++ b/drivers/char/tpm/tpm_tis.c @@ -610,6 +610,7 @@ static const struct tpm_class_ops tpm_tis = { static struct tpm_tis_phy_ops tis_phy_ops = { .data_expect_mask = TPM_STS_DATA_EXPECT, .data_expect_val = TPM_STS_DATA_EXPECT, + .post_probe = tpm_tis_post_probe, }; static int tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len, @@ -807,6 +808,23 @@ static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) return; } +static int tpm_tis_post_probe(struct tpm_chip *chip) +{ + int probe; + + if (!itpm) { + probe = probe_itpm(chip); + if (probe < 0) + return -ENODEV; + itpm = !!probe; + } + + if (itpm) + dev_info(chip->dev.parent, "Intel iTPM workaround enabled\n"); + + return 0; +} + static bool interrupts = true; module_param(interrupts, bool, 0444); MODULE_PARM_DESC(interrupts, "Enable interrupts"); @@ -910,19 +928,14 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info, (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", vendor >> 16, rid); - if (!itpm) { - probe = probe_itpm(chip); - if (probe < 0) { + if (priv->post_probe) { + rc = priv->post_probe(chip); + if (rc < 0) { rc = -ENODEV; goto out_err; } - itpm = !!probe; } - if (itpm) - dev_info(dev, "Intel iTPM workaround enabled\n"); - - /* Figure out the capabilities */ rc = tpm_read32(chip, TPM_INTF_CAPS(priv->locality), &intfcaps); if (rc < 0) diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h index cba82f8..dc5c136 100644 --- a/drivers/char/tpm/tpm_tis_core.h +++ b/drivers/char/tpm/tpm_tis_core.h @@ -52,6 +52,7 @@ struct tpm_tis_data { const struct tpm_tis_class_lowlevel *lowlevel; const struct tpm_tis_phy_ops *phy_ops; void *phy_id; + int (*post_probe)(struct tpm_chip *chip); }; static inline int tpm_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,