From patchwork Tue Jun 7 23:02:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jarkko Sakkinen X-Patchwork-Id: 9162791 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3BCF760832 for ; Tue, 7 Jun 2016 23:03:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2D1C328353 for ; Tue, 7 Jun 2016 23:03:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 21F662836F; Tue, 7 Jun 2016 23:03:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9A9532836E for ; Tue, 7 Jun 2016 23:02:59 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1bAQ1R-0001PY-Uq; Tue, 07 Jun 2016 23:02:57 +0000 Received: from sog-mx-1.v43.ch3.sourceforge.com ([172.29.43.191] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1bAQ1Q-0001PQ-Qo for tpmdd-devel@lists.sourceforge.net; Tue, 07 Jun 2016 23:02:56 +0000 X-ACL-Warn: Received: from mga02.intel.com ([134.134.136.20]) by sog-mx-1.v43.ch3.sourceforge.com with esmtp (Exim 4.76) id 1bAQ1P-0006hM-QJ for tpmdd-devel@lists.sourceforge.net; Tue, 07 Jun 2016 23:02:56 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 07 Jun 2016 16:02:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,436,1459839600"; d="scan'208";a="993075753" Received: from raunstru-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.10.27]) by orsmga002.jf.intel.com with ESMTP; 07 Jun 2016 16:02:46 -0700 From: Jarkko Sakkinen To: Peter Huewe Date: Wed, 8 Jun 2016 02:02:02 +0300 Message-Id: <1465340522-1112-4-git-send-email-jarkko.sakkinen@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1465340522-1112-1-git-send-email-jarkko.sakkinen@linux.intel.com> References: <1465340522-1112-1-git-send-email-jarkko.sakkinen@linux.intel.com> X-Headers-End: 1bAQ1P-0006hM-QJ Cc: open list , linux-security-module@vger.kernel.org, "moderated list:TPM DEVICE DRIVER" Subject: [tpmdd-devel] [PATCH 3/3] tpm, tpm_crb: runtime power management X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: tpmdd-devel-bounces@lists.sourceforge.net X-Virus-Scanned: ClamAV using ClamSMTP The register TPM_CRB_CTRL_REQ_0 contains bits goIdle and cmdReady for invoking the chip to suspend and resume. This commit implements runtime PM for tpm_crb by using these bits. The legacy ACPI start (SMI + DMA) based devices do not support these bits. Thus this functionality only is enabled only for CRB start (MMIO) based devices. Signed-off-by: Jarkko Sakkinen --- drivers/char/tpm/tpm-interface.c | 3 ++ drivers/char/tpm/tpm_crb.c | 62 ++++++++++++++++++++++++++++++++++++++-- 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c index 5e3c1b6..3b85648 100644 --- a/drivers/char/tpm/tpm-interface.c +++ b/drivers/char/tpm/tpm-interface.c @@ -29,6 +29,7 @@ #include #include #include +#include #include "tpm.h" #include "tpm_eventlog.h" @@ -350,6 +351,7 @@ ssize_t tpm_transmit(struct tpm_chip *chip, const char *buf, return -E2BIG; } + pm_runtime_get_sync(chip->dev.parent); mutex_lock(&chip->tpm_mutex); rc = chip->ops->send(chip, (u8 *) buf, count); @@ -394,6 +396,7 @@ out_recv: "tpm_transmit: tpm_recv: error %zd\n", rc); out: mutex_unlock(&chip->tpm_mutex); + pm_runtime_put_sync(chip->dev.parent); return rc; } diff --git a/drivers/char/tpm/tpm_crb.c b/drivers/char/tpm/tpm_crb.c index ca2cad9..71cc7cd 100644 --- a/drivers/char/tpm/tpm_crb.c +++ b/drivers/char/tpm/tpm_crb.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "tpm.h" #define ACPI_SIG_TPM2 "TPM2" @@ -41,7 +42,6 @@ enum crb_ca_request { enum crb_ca_status { CRB_CA_STS_ERROR = BIT(0), - CRB_CA_STS_TPM_IDLE = BIT(1), }; enum crb_start { @@ -68,6 +68,8 @@ struct crb_control_area { enum crb_status { CRB_STS_COMPLETE = BIT(0), + CRB_STS_READY = BIT(1), + CRB_STS_IDLE = BIT(2), }; enum crb_flags { @@ -81,9 +83,52 @@ struct crb_priv { struct crb_control_area __iomem *cca; u8 __iomem *cmd; u8 __iomem *rsp; + wait_queue_head_t idle_queue; }; -static SIMPLE_DEV_PM_OPS(crb_pm, tpm_pm_suspend, tpm_pm_resume); +static int __maybe_unused crb_runtime_suspend(struct device *dev) +{ + struct tpm_chip *chip = dev_get_drvdata(dev); + struct crb_priv *priv = dev_get_drvdata(&chip->dev); + u32 req; + + if (priv->flags & CRB_FL_ACPI_START) + return 0; + + req = ioread32(&priv->cca->req); + + iowrite32(cpu_to_le32(req | CRB_CA_REQ_GO_IDLE), &priv->cca->req); + + if (wait_for_tpm_stat(chip, CRB_STS_IDLE, chip->timeout_c, + &priv->idle_queue, false)) + dev_warn(&chip->dev, "idle timed out\n"); + + return 0; +} + +static int __maybe_unused crb_runtime_resume(struct device *dev) +{ + struct tpm_chip *chip = dev_get_drvdata(dev); + struct crb_priv *priv = dev_get_drvdata(&chip->dev); + u32 req; + + if (priv->flags & CRB_FL_ACPI_START) + return 0; + + req = ioread32(&priv->cca->req); + iowrite32(cpu_to_le32(req | CRB_CA_REQ_CMD_READY), &priv->cca->req); + + if (wait_for_tpm_stat(chip, CRB_STS_READY, chip->timeout_c, + &priv->idle_queue, false)) + dev_warn(&chip->dev, "wake timed out\n"); + + return 0; +} + +static const struct dev_pm_ops crb_pm = { + SET_RUNTIME_PM_OPS(crb_runtime_suspend, crb_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(tpm_pm_suspend, tpm_pm_resume) +}; static u8 crb_status(struct tpm_chip *chip) { @@ -94,6 +139,14 @@ static u8 crb_status(struct tpm_chip *chip) CRB_START_INVOKE) sts |= CRB_STS_COMPLETE; + if ((ioread32(&priv->cca->req) & CRB_CA_REQ_CMD_READY) != + CRB_CA_REQ_CMD_READY) + sts |= CRB_STS_READY; + + if ((ioread32(&priv->cca->req) & CRB_CA_REQ_GO_IDLE) != + CRB_CA_REQ_GO_IDLE) + sts |= CRB_STS_IDLE; + return sts; } @@ -206,6 +259,8 @@ static int crb_init(struct acpi_device *device, struct crb_priv *priv) if (IS_ERR(chip)) return PTR_ERR(chip); + pm_runtime_set_active(&device->dev); + pm_runtime_enable(&device->dev); dev_set_drvdata(&chip->dev, priv); chip->acpi_dev_handle = device->handle; chip->flags = TPM_CHIP_FLAG_TPM2; @@ -348,6 +403,8 @@ static int crb_acpi_add(struct acpi_device *device) !strcmp(acpi_device_hid(device), "MSFT0101")) priv->flags |= CRB_FL_CRB_START; + init_waitqueue_head(&priv->idle_queue); + if (sm == ACPI_TPM2_START_METHOD || sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) priv->flags |= CRB_FL_ACPI_START; @@ -366,6 +423,7 @@ static int crb_acpi_remove(struct acpi_device *device) tpm_chip_unregister(chip); + pm_runtime_disable(dev); return 0; }