From patchwork Fri Mar 24 09:55:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiandi An X-Patchwork-Id: 9642525 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 559FA6020B for ; Fri, 24 Mar 2017 09:56:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 236C92521E for ; Fri, 24 Mar 2017 09:56:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 17E4427C0B; Fri, 24 Mar 2017 09:56:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8F77B2521E for ; Fri, 24 Mar 2017 09:56:10 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-2.v29.ch3.sourceforge.com) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1crLx3-000435-AW; Fri, 24 Mar 2017 09:56:09 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1crLx2-000430-Pl for tpmdd-devel@lists.sourceforge.net; Fri, 24 Mar 2017 09:56:08 +0000 Received-SPF: pass (sog-mx-4.v43.ch3.sourceforge.com: domain of codeaurora.org designates 198.145.29.96 as permitted sender) client-ip=198.145.29.96; envelope-from=anjiandi@codeaurora.org; helo=smtp.codeaurora.org; Received: from smtp.codeaurora.org ([198.145.29.96]) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1crLx1-0003E1-RZ for tpmdd-devel@lists.sourceforge.net; Fri, 24 Mar 2017 09:56:08 +0000 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 833F060DA8; Fri, 24 Mar 2017 09:56:00 +0000 (UTC) Received: from anjiandi-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: anjiandi@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id E2E5160D93; Fri, 24 Mar 2017 09:55:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E2E5160D93 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=anjiandi@codeaurora.org From: Jiandi An To: tpmdd-devel@lists.sourceforge.net Date: Fri, 24 Mar 2017 04:55:45 -0500 Message-Id: <1490349345-26910-3-git-send-email-anjiandi@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1490349345-26910-1-git-send-email-anjiandi@codeaurora.org> References: <1490349345-26910-1-git-send-email-anjiandi@codeaurora.org> X-Headers-End: 1crLx1-0003E1-RZ Cc: Jiandi An , rafael.j.wysocki@intel.com, robert.moore@intel.com, lv.zheng@intel.com, lenb@kernel.org Subject: [tpmdd-devel] [PATCH v4 2/2] tpm/tpm_crb: Enable TPM CRB interface for ARM64 X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: tpmdd-devel-bounces@lists.sourceforge.net X-Virus-Scanned: ClamAV using ClamSMTP This enables TPM Command Response Buffer interface driver for ARM64 and implements an ARM specific TPM CRB start method that invokes a Secure Monitor Call (SMC) to request the TrustZone Firmware to execute or cancel a TPM 2.0 command. In ARM, TrustZone security extensions enable a secure software environment with Secure Monitor mode. A Secure Monitor Call (SMC) is used to enter the Secure Monitor mode and perform a Secure Monitor service to communicate with TrustZone firmware which has control over the TPM hardware. Signed-off-by: Jiandi An Reviewed-by: Jarkko Sakkinen Tested-by: Shanker Donthineni --- drivers/char/tpm/Kconfig | 2 +- drivers/char/tpm/tpm_crb.c | 67 ++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 66 insertions(+), 3 deletions(-) diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig index d520ac5..a3035220 100644 --- a/drivers/char/tpm/Kconfig +++ b/drivers/char/tpm/Kconfig @@ -136,7 +136,7 @@ config TCG_XEN config TCG_CRB tristate "TPM 2.0 CRB Interface" - depends on X86 && ACPI + depends on ACPI ---help--- If you have a TPM security chip that is compliant with the TCG CRB 2.0 TPM specification say Yes and it will be accessible diff --git a/drivers/char/tpm/tpm_crb.c b/drivers/char/tpm/tpm_crb.c index 9f31609..a9773fa 100644 --- a/drivers/char/tpm/tpm_crb.c +++ b/drivers/char/tpm/tpm_crb.c @@ -20,6 +20,9 @@ #include #include #include +#ifdef CONFIG_ARM64 +#include +#endif #include "tpm.h" #define ACPI_SIG_TPM2 "TPM2" @@ -83,6 +86,7 @@ enum crb_status { enum crb_flags { CRB_FL_ACPI_START = BIT(0), CRB_FL_CRB_START = BIT(1), + CRB_FL_CRB_SMC_START = BIT(2), }; struct crb_priv { @@ -93,6 +97,15 @@ struct crb_priv { u8 __iomem *cmd; u8 __iomem *rsp; u32 cmd_size; + u32 smc_func_id; +}; + +struct tpm2_crb_smc { + u32 interrupt; + u8 interrupt_flags; + u8 op_flags; + u16 reserved2; + u32 smc_func_id; }; /** @@ -112,7 +125,8 @@ struct crb_priv { */ static int __maybe_unused crb_go_idle(struct device *dev, struct crb_priv *priv) { - if (priv->flags & CRB_FL_ACPI_START) + if ((priv->flags & CRB_FL_ACPI_START) || + (priv->flags & CRB_FL_CRB_SMC_START)) return 0; iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->regs_t->ctrl_req); @@ -157,7 +171,8 @@ static bool crb_wait_for_reg_32(u32 __iomem *reg, u32 mask, u32 value, static int __maybe_unused crb_cmd_ready(struct device *dev, struct crb_priv *priv) { - if (priv->flags & CRB_FL_ACPI_START) + if ((priv->flags & CRB_FL_ACPI_START) || + (priv->flags & CRB_FL_CRB_SMC_START)) return 0; iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->regs_t->ctrl_req); @@ -223,6 +238,34 @@ static int crb_do_acpi_start(struct tpm_chip *chip) return rc; } +#ifdef CONFIG_ARM64 +/* + * This is a TPM Command Response Buffer start method that invokes a + * Secure Monitor Call to requrest the firmware to execute or cancel + * a TPM 2.0 command. + */ +static int tpm_crb_smc_start(struct device *dev, unsigned long func_id) +{ + struct arm_smccc_res res; + + arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res); + if (res.a0 != 0) { + dev_err(dev, + FW_BUG "tpm_crb_smc_start() returns res.a0 = 0x%lx\n", + res.a0); + return -EIO; + } + + return 0; +} +#else +static int tpm_crb_smc_start(struct device *dev, unsigned long func_id) +{ + dev_err(dev, FW_BUG "tpm_crb: incorrect start method\n"); + return -EINVAL; +} +#endif + static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len) { struct crb_priv *priv = dev_get_drvdata(&chip->dev); @@ -250,6 +293,11 @@ static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len) if (priv->flags & CRB_FL_ACPI_START) rc = crb_do_acpi_start(chip); + if (priv->flags & CRB_FL_CRB_SMC_START) { + iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start); + rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id); + } + return rc; } @@ -442,6 +490,7 @@ static int crb_acpi_add(struct acpi_device *device) struct crb_priv *priv; struct tpm_chip *chip; struct device *dev = &device->dev; + struct tpm2_crb_smc *crb_smc; acpi_status status; u32 sm; int rc; @@ -474,6 +523,20 @@ static int crb_acpi_add(struct acpi_device *device) sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD) priv->flags |= CRB_FL_ACPI_START; + if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_SMC) { + if (buf->header.length < (sizeof(*buf) + sizeof(*crb_smc))) { + dev_err(dev, + FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n", + buf->header.length, + ACPI_TPM2_COMMAND_BUFFER_WITH_SMC); + return -EINVAL; + } + crb_smc = ACPI_ADD_PTR(struct tpm2_crb_smc, buf, + ACPI_TPM2_START_METHOD_PARAMETER_OFFSET); + priv->smc_func_id = crb_smc->smc_func_id; + priv->flags |= CRB_FL_CRB_SMC_START; + } + rc = crb_map_io(device, priv, buf); if (rc) return rc;