From patchwork Mon Jun 10 19:31:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10985363 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 145C8924 for ; Mon, 10 Jun 2019 19:34:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 055E027F17 for ; Mon, 10 Jun 2019 19:34:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id ED9AF286CD; Mon, 10 Jun 2019 19:34:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 89EE527F17 for ; Mon, 10 Jun 2019 19:34:11 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1p-0007cp-7u; Mon, 10 Jun 2019 19:32:25 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1haQ1n-0007cP-CR for xen-devel@lists.xenproject.org; Mon, 10 Jun 2019 19:32:23 +0000 X-Inumbo-ID: 76ac26e8-8bb6-11e9-a02e-ef0228b4bcef Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 76ac26e8-8bb6-11e9-a02e-ef0228b4bcef; Mon, 10 Jun 2019 19:32:20 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 21C91344; Mon, 10 Jun 2019 12:32:20 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 381EE3F73C; Mon, 10 Jun 2019 12:32:19 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 10 Jun 2019 20:31:58 +0100 Message-Id: <20190610193215.23704-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 Subject: [Xen-devel] [PATCH 00/17] xen/arm64: Rework head.S to make it more compliant with the Arm Arm X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , Stefano Stabellini , andrii_anisov@epam.com, Oleksandr_Tyshchenko@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Hi all, This is part of the boot/memory rework for Xen on Arm, but not sent as MM-PARTx as this is focusing on the boot code. Similar to the memory code, the boot code is not following the Arm Arm and could lead to memory corruption/TLB conflict abort. I am not aware of any platforms where Xen fails to boot, yet it should be fixed sooner rather than later. While making the code more compliant, I have also took the opportunity to simplify the boot and also add more documentation. After this series, the boot CPU and secondary CPUs path is mostly compliant with the Arm Arm. The only non-compliant places I am aware of are: 1) create_page_tables: Some rework is necessary to update the page-tables safely without the MMU on. 2) The switches between boot and runtime page-tables (for both boot CPU and secondary CPUs) are not safe. Both will be addressed in follow-up work. Lastly, only Arm64 has been modified so far. Arm32 requires the same modifications. It will be sent once I gathered feedback on the approach. Note that the series have a minor clash with MM-PART3 and reference some change done in MM-PART1. Yet the code is mostly self-contained to xen/arch/arm64/head.S. For convenience I provided a branch based on staging: git://xenbits.xen.org/people/julieng/xen-unstable.git branch boot/arm64/v1 Cheers, Julien Grall (17): xen/arm64: head Mark the end of subroutines with ENDPROC xen/arm64: head: Don't clobber x30/lr in the macro PRINT xen/arm64: head: Rework UART initialization on boot CPU xen/arm64: head: Don't "reserve" x24 for the CPUID xen/arm64: head: Introduce print_reg xen/arm64: head: Introduce distinct paths for the boot CPU and secondary CPUs xen/arm64: head: Rework and document check_cpu_mode() xen/arm64: head: Rework and document zero_bss() xen/arm64: head: Improve coding style and document cpu_init() xen/arm64: head: Improve coding style and document create_pages_tables() xen/arm64: head: Document enable_mmu() xen/arm64: head: Move assembly switch to the runtime PT in secondary CPUs path xen/arm64: head: Don't setup the fixmap on secondary CPUs xen/arm64: head: Remove ID map as soon as it is not used xen/arm64: head: Rework and document setup_fixmap() xen/arm64: head: Rework and document launch() xen/arm64: Zero BSS after the MMU and D-cache is turned on xen/arch/arm/arm64/head.S | 396 +++++++++++++++++++++++++++++++++------------- xen/arch/arm/mm.c | 23 ++- 2 files changed, 306 insertions(+), 113 deletions(-)