From patchwork Mon Dec 12 09:55:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13070876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5CDB7C4332F for ; Mon, 12 Dec 2022 09:55:36 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.459250.716939 (Exim 4.92) (envelope-from ) id 1p4fWx-0002ob-JK; Mon, 12 Dec 2022 09:55:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 459250.716939; Mon, 12 Dec 2022 09:55:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1p4fWx-0002oR-GE; Mon, 12 Dec 2022 09:55:27 +0000 Received: by outflank-mailman (input) for mailman id 459250; Mon, 12 Dec 2022 09:55:26 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1p4fWw-0002mq-Nb for xen-devel@lists.xenproject.org; Mon, 12 Dec 2022 09:55:26 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1p4fWw-0001RL-G5; Mon, 12 Dec 2022 09:55:26 +0000 Received: from 54-240-197-224.amazon.com ([54.240.197.224] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1p4fWw-0001lz-8B; Mon, 12 Dec 2022 09:55:26 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:MIME-Version: Message-Id:Date:Subject:Cc:To:From; bh=UBM5+MelmvU1WiyBwdDTmufwAhslCftnA+r1K3UrpHg=; b=FLOkBcBqz62GKuDlPu+v7X+FdT mAKG49ryhF4qfPbZVRMGAFZNOGlAGsCIpJIm4yEmUzE3p1AH9hTGYNS7EH9xkItx6OKBcff5O2/Pp mJTLPgHxyp4sEKgyc8Wa9arblAUevW4ltg+Q1nBKyCgtYPF/UNKUZQKTuz4wbXmennT0=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: michal.orzel@amd.com, Luca.Fancellu@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v3 00/18] xen/arm: Don't switch TTBR while the MMU is on Date: Mon, 12 Dec 2022 09:55:05 +0000 Message-Id: <20221212095523.52683-1-julien@xen.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 From: Julien Grall Hi all, Currently, Xen on Arm will switch TTBR whilst the MMU is on. This is similar to replacing existing mappings with new ones. So we need to follow a break-before-make sequence. When switching the TTBR, we need to temporary disable the MMU before updating the TTBR. This means the page-tables must contain an identity mapping. The current memory layout is not very flexible and has an higher chance to clash with the identity mapping. On Arm64, we have plenty of unused virtual address space Therefore, we can simply reshuffle the layout to leave the first part of the virtual address space empty. On Arm32, the virtual address space is already quite full. Even if we find space, it would be necessary to have a dynamic layout. So a different approach will be necessary. The chosen one is to have a temporary mapping that will be used to jumped from the ID mapping to the runtime mapping (or vice versa). The temporary mapping will be overlapping with the domheap area as it should not be used when switching on/off the MMU. The Arm32 part is not yet addressed and will be handled in a follow-up series. After this series, most of Xen page-table code should be compliant with the Arm Arm. The last two issues I am aware of are: - domheap: Mappings are replaced without using the Break-Before-Make approach. - The cache is not cleaned/invalidated when updating the page-tables with Data cache off (like during early boot). The long term plan is to get rid of boot_* page tables and then directly use the runtime pages. This means for coloring, we will need to build the pages in the relocated Xen rather than the current Xen. For convience, I pushed a branch with everything applied: https://xenbits.xen.org/git-http/people/julieng/xen-unstable.git branch boot-pt-rework-v3 Cheers, Julien Grall (18): xen/arm64: flushtlb: Reduce scope of barrier for local TLB flush xen/arm64: flushtlb: Implement the TLBI repeat workaround for TLB flush by VA xen/arm32: flushtlb: Reduce scope of barrier for local TLB flush xen/arm: flushtlb: Reduce scope of barrier for the TLB range flush xen/arm: Clean-up the memory layout xen/arm32: head: Replace "ldr rX, =