| Message ID | 20230306163425.8324-1-jgross@suse.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | x86/mtrr: fix handling with PAT but without MTRR | expand |
From: Juergen Gross <jgross@suse.com> Sent: Monday, March 6, 2023 8:34 AM > > This series tries to fix the rather special case of PAT being available > without having MTRRs (either due to CONFIG_MTRR being not set, or > because the feature has been disabled e.g. by a hypervisor). > > The main use cases are Xen PV guests and SEV-SNP guests running under > Hyper-V. > > Instead of trying to work around all the issues by adding if statements > here and there, just try to use the complete available infrastructure > by setting up a read-only MTRR state when needed. > > In the Xen PV case the current MTRR MSR values can be read from the > hypervisor, while for the SEV-SNP case all needed is to set the > default caching mode to "WB". > > I have added more cleanup which has been discussed when looking into > the most recent failures. > > Note that I couldn't test the Hyper-V related change (patch 3). > > Running on bare metal and with Xen didn't show any problems with the > series applied. > > It should be noted that patches 9+10 are replacing today's way to > lookup the MTRR cache type for a memory region from looking at the > MTRR register values to building a memory map with the cache types. > This should make the lookup much faster and much easier to understand. > > Changes in V2: > - replaced former patches 1+2 with new patches 1-4, avoiding especially > the rather hacky approach of V1, while making all the MTRR type > conflict tests available for the Xen PV case > - updated patch 6 (was patch 4 in V1) > > Changes in V3: > - dropped patch 5 of V2, as already applied > - split patch 1 of V2 into 2 patches > - new patches 6-10 > - addressed comments > > Changes in V4: > - addressed comments > > Juergen Gross (12): > x86/mtrr: split off physical address size calculation > x86/mtrr: optimize mtrr_calc_physbits() > x86/mtrr: support setting MTRR state for software defined MTRRs > x86/hyperv: set MTRR state when running as SEV-SNP Hyper-V guest > x86/xen: set MTRR state when running as Xen PV initial domain > x86/mtrr: replace vendor tests in MTRR code > x86/mtrr: allocate mtrr_value array dynamically > x86/mtrr: add get_effective_type() service function > x86/mtrr: construct a memory map with cache modes > x86/mtrr: use new cache_map in mtrr_type_lookup() > x86/mtrr: don't let mtrr_type_lookup() return MTRR_TYPE_INVALID > x86/mm: only check uniform after calling mtrr_type_lookup() > > arch/x86/include/asm/mtrr.h | 15 +- > arch/x86/include/uapi/asm/mtrr.h | 6 +- > arch/x86/kernel/cpu/mshyperv.c | 4 + > arch/x86/kernel/cpu/mtrr/amd.c | 2 +- > arch/x86/kernel/cpu/mtrr/centaur.c | 2 +- > arch/x86/kernel/cpu/mtrr/cleanup.c | 4 +- > arch/x86/kernel/cpu/mtrr/cyrix.c | 2 +- > arch/x86/kernel/cpu/mtrr/generic.c | 492 ++++++++++++++++++----------- > arch/x86/kernel/cpu/mtrr/mtrr.c | 94 +++--- > arch/x86/kernel/cpu/mtrr/mtrr.h | 7 +- > arch/x86/kernel/setup.c | 2 + > arch/x86/mm/pgtable.c | 24 +- > arch/x86/xen/enlighten_pv.c | 52 +++ > 13 files changed, 454 insertions(+), 252 deletions(-) > > -- > 2.35.3 I've tested a Linux 6.2 kernel plus this series in a normal Hyper-V guest and in a Hyper-V guest using SEV-SNP with vTOM. MMIO memory is correctly mapped as WB or UC- depending on the request, which fixes the original problem introduced for Hyper-V by the Xen-specific change. Tested-by: Michael Kelley <mikelley@microsoft.com>