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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , Ayan Kumar Halder Subject: [XEN v1 0/4] xen/arm: Split MMU code as the prepration of MPU work form Arm32 Date: Mon, 11 Sep 2023 14:59:38 +0100 Message-ID: <20230911135942.791206-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002529E:EE_|MW3PR12MB4380:EE_ X-MS-Office365-Filtering-Correlation-Id: 37418180-d3aa-4d1b-ffb9-08dbb2cf6ac3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: am9dTSa4DK5pdr8ngr1GueaFz/5cbpdVGdhGihaux0tIG1DxKOWA15V1JrGlCMO6KQ25lEW9q2EjiV79NtsdXg05K9SHLd8Slw0LzaO5Kv9YNHqNEMKARcKloFC7+1/UUWPWYA0CVtmTgqWR2JMZfJjq1wQCFO5zOVTXoN2mOBjKREkSyWdmIR3Y9FXzTP4IDcoM6C7T8i4bz+xbUIwn0PEHH5ISrXUQcEpTbuf7KwqnKxOc14ff5C0wTU6txZvq8CXoDyEbdMrE3AoaS6YCYdzhKJRvGxy8hL6uroDHPNGBHJ8MFlvNh7I3WKVYAMiHzPIoGJlva3NINqezlLgA84rLjv+r8O/lFUOELTCyte8rZyi69XuBUGuGh2/RRQRPp/HhxOHH8Q0r6B+13nl5ghiyWfH3nRjqtYhwEaYtGxEgyf7Zp24ZZ8zuy9FUH+c+/JP3uk6t6Rklt/ASaDnjroDLQ0cU3bavi7vWy3qyYdRboP64f2tCYUom1al4VB6ZdiOgitmSfXjUL/SDWTH0D+azI/Gdjkm0/iRv7OfMIK1h8pBNxU+tLQzhnLejAewSaTlNXXNepAPOBF++2sMcM0WWKuEL0iV/Fug+wBB0dpsYfy+yPUj9Orn8n+mw1/VwRZmIPk1k/57WgpEsML4EgBMpmewFXRhGySqD7joZIFlQ2EvpKK6rUpN5sSzYhPldmfb6n1QBeVhtU/LOhEkEHwfPpXmsGXFkRFPzj7ejyduJ814tjqW5yNbwOExYM057gEE3+keD84Xw4aAhai6lUQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(376002)(136003)(396003)(39860400002)(346002)(1800799009)(82310400011)(451199024)(186009)(40470700004)(36840700001)(46966006)(5660300002)(54906003)(41300700001)(4326008)(8936002)(8676002)(6916009)(70206006)(316002)(70586007)(40460700003)(47076005)(81166007)(478600001)(36756003)(40480700001)(103116003)(2616005)(6666004)(2906002)(336012)(4744005)(86362001)(426003)(26005)(1076003)(83380400001)(82740400003)(356005)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Sep 2023 14:00:12.1636 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 37418180-d3aa-4d1b-ffb9-08dbb2cf6ac3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4380 Hi, These are the set of patches based on top of "[PATCH v6 00/13] xen/arm: Split MMU code as the prepration of MPU work". These patches aim to do similar MMU rework for Arm32. Similar to the former series, this is the preparation work to add MPU support for Arm32. Ayan Kumar Halder (4): xen/arm: arm32: Move pt_enforce_wxn() so that it can be bundled with other MMU functionality xen/arm32: head.S: Introduce enable_{boot,secondary}_cpu_mm() xen/arm32: Split and move MMU-specific head.S to mmu/head.S xen/arm: traps.c: Enclose VMSA specific registers within CONFIG_MMU xen/arch/arm/arm32/head.S | 567 +----------------------- xen/arch/arm/arm32/mmu/Makefile | 1 + xen/arch/arm/arm32/mmu/head.S | 556 +++++++++++++++++++++++ xen/arch/arm/include/asm/arm32/macros.h | 62 +++ xen/arch/arm/traps.c | 17 +- 5 files changed, 639 insertions(+), 564 deletions(-) create mode 100644 xen/arch/arm/arm32/mmu/head.S