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pr=C From: Ayan Kumar Halder To: CC: , , , , , , Ayan Kumar Halder Subject: [PATCH v3 0/2] xen/arm: Split MMU code as the prepration of MPU work form Arm32 Date: Tue, 7 Nov 2023 11:02:15 +0000 Message-ID: <20231107110217.1827379-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00001506:EE_|PH0PR12MB8031:EE_ X-MS-Office365-Filtering-Correlation-Id: 830e1ed1-3fc1-481d-8de4-08dbdf810919 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JIwUSDJD2duLdL5UpbjiY605g8pUxKyzgZ55k4PTtwliFmO4dXyZlIpYdNm29oR2z9OhODoMcyLoOZX3PkcI7C8LUohkdFSRkjjCdHWb0qpOrQlpWsZBHcapopkOJliJFpV1xL9NAm7jKuKpARu1kIeYhFxbE59v9WhqhQX7pRDGCX0tsHIKgrZvceUpZuAAPVupgVXxCsjC5gY8U4jwvVciVJXoQT1bTLlvuOFpWoOy/8Wet+o6eGwC9j8nIrhwnkOqKh63G3fg/270Vh4dZ04FQuynExhknCizKBhqVhi5O3K99krCiIwoxVqY3fH+slXdOH9AgOc6/zlVB7rPYe7ZjUlZ0cVKE6giN4AdpchmHIZepFGdt1giF24POZ6ptfKi59YlfBZSHkYKw3emmUl0iCiKfNyIBRW7RRiviydCjYOqbiaXK8u5+9GMRd2mODD8OsLywAr5I+suSxDqnj17XCIpYJPToQ3CsaRgitts5Z/Tgr7bGJewYBVOymsqxgWnHcGM/fcvP8OHe258sBcXpaoFN7bIR7h+g/AaYxr6d2fu6iNSYukTP9/uzWoFhjqa+bWoSna8eBBaXm1AmaT2z5yW9xtzOne8LjEzi/9F6l7q58DesRu2soiC9x25oi7X8or9dbWbd3jl5fekBmjbRHSSvVPSzgMFyrBnOgnxL/1507bq/wTjffysl31zsZ0CDEePyoqQtYkWvi28PHw8hcbLxh5/Dpg3RFD5jknYZbZ2nqGqqI6fdBBGbEwo X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(346002)(396003)(376002)(136003)(230922051799003)(186009)(1800799009)(451199024)(64100799003)(82310400011)(40470700004)(46966006)(36840700001)(8936002)(40460700003)(47076005)(40480700001)(1076003)(2616005)(426003)(336012)(81166007)(26005)(36756003)(103116003)(356005)(316002)(8676002)(2906002)(54906003)(966005)(70586007)(41300700001)(478600001)(6666004)(70206006)(6916009)(5660300002)(4326008)(86362001)(83380400001)(82740400003)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2023 11:02:29.8720 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 830e1ed1-3fc1-481d-8de4-08dbdf810919 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001506.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8031 Hi, These are the set of patches based on top of "[PATCH v8 0/8] xen/arm: Split MMU code as the prepration of MPU work". This is the preparation work to add MPU support on Arm32. There are two more dependencies for this series :- 1. "[XEN v1 1/4] xen/arm: arm32: Move pt_enforce_wxn() so that it can be bundled with other MMU functionality" is merged into "[PATCH v8 3/8] xen/arm: Fold mmu_init_secondary_cpu() to head.S" as per the discussion on [1]. 2. "[XEN v4] xen/arm32: head: Replace load_paddr with adr_l when they are equivalent" [1] - https://lore.kernel.org/all/f098a07d-fa19-4b40-bfac-7b121524382a@xen.org/#t Changes from :- v1 - Dropped "[XEN v1 1/4] xen/arm: arm32: Move pt_enforce_wxn() so that it can be bundled with other MMU functionality" and "[XEN v1 4/4] xen/arm: traps.c: Enclose VMSA specific registers within CONFIG_MMU". v2 - Changes mentioned in individual patches. Ayan Kumar Halder (2): xen/arm32: head: Introduce enable_{boot,secondary}_cpu_mm() xen/arm32: head Split and move MMU-specific head.S to mmu/head.S xen/arch/arm/arm32/head.S | 578 +----------------------- xen/arch/arm/arm32/mmu/Makefile | 1 + xen/arch/arm/arm32/mmu/head.S | 573 +++++++++++++++++++++++ xen/arch/arm/include/asm/arm32/macros.h | 58 ++- 4 files changed, 641 insertions(+), 569 deletions(-) create mode 100644 xen/arch/arm/arm32/mmu/head.S