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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , "Ayan Kumar Halder" Subject: [XEN v4 0/2] xen/arm: Split MMU code as the prepration of MPU work form Arm32 Date: Fri, 17 Nov 2023 15:30:59 +0000 Message-ID: <20231117153101.2902792-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CB:EE_|IA0PR12MB8254:EE_ X-MS-Office365-Filtering-Correlation-Id: 0d6506b2-e1f8-47df-c4b2-08dbe7823d6d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dpJE/cBrMJ447rIZX6aBJCXQgneb1HEC0ORgrrQjAuHCZn3DQj3LCgS0TWexLfNG5QGD57avbgMJGuN/xg3Jq6Or+I1XZgiI6Q1jsN/PRro6CNd7qiTFkIpQ6YHmrfZ+Kq9Io3CtaEvnkn1jzlb/IRFqXVAABzzn9TUf1rUzlkRSQTsBNYEX29qO939TgRzByZ9TBlgHjq/ONfgbtOM57XdDE75rZHuKIi8MXRQBvL19pmCvSdQMXoo0Yqm6V+myKE40Rm9XMxOdvaFHgg534Dw6Fl7oVL5Pn/cW2at7TNbcM04xeiZJCbvFYJLu51i3OZ/N/X13VyOQ9ejWcu4bY1+oyKx5G/thEIFRd5IFhWwng2+M76o1r7wSmhk9Yd0XmwIVzN+o/L1q7cU+C/Mx33DtqGKBFMO4o1rCFutlR2pqb2vk8w7ZafFkWpB1Y/bmG5jpai8jOblafIPoDFUpDakn49Cx5xTLv+kQ4i4+QcUX7cn+onRJu0fxztvCfnfBE0uPQhlFTOYkFUJR1nqHlClu3Z8iv+3zqkjqgDXCYPLOoLtAOyO7kOyPS9f73KSqOIzgQqdyEqyOhGjFUsVC4liiEZaqMmxBsR13o4/1lxXRa+OMrDMTxeS1znOW1DU/aHH4Dkj1zxtaApnWGAL3v+5exXJL5N9MBqOwsauQ2XhxcxyjYHNpe3NTr5cSAdCXYYNjPiHE6FTRrnM0amOCDhyCQJnFgmp/Dlnp/pYE2dMOWLUxMMa8tBatF+dbXz6mmaCIHOB0uJm74OGjl1svMQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(39860400002)(346002)(376002)(136003)(230922051799003)(1800799009)(451199024)(186009)(82310400011)(64100799003)(46966006)(40470700004)(36840700001)(47076005)(478600001)(40460700003)(36756003)(2906002)(82740400003)(426003)(336012)(81166007)(41300700001)(356005)(103116003)(2616005)(70206006)(1076003)(83380400001)(6916009)(70586007)(54906003)(316002)(86362001)(26005)(36860700001)(5660300002)(4744005)(4326008)(8936002)(8676002)(40480700001)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 15:31:16.4957 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0d6506b2-e1f8-47df-c4b2-08dbe7823d6d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8254 Hi, These are the set of patches based on top of "[PATCH v9 0/8] xen/arm: Split MMU code as the prepration of MPU work". This is the preparation work to add MPU support on Arm32. Changes from :- v1 - Dropped "[XEN v1 1/4] xen/arm: arm32: Move pt_enforce_wxn() so that it can be bundled with other MMU functionality" and "[XEN v1 4/4] xen/arm: traps.c: Enclose VMSA specific registers within CONFIG_MMU". v2 - Changes mentioned in individual patches. v3 - Changes mentioned in individual patches. Ayan Kumar Halder (2): xen/arm32: head: Introduce enable_{boot,secondary}_cpu_mm() xen/arm32: head Split and move MMU-specific head.S to mmu/head.S xen/arch/arm/arm32/head.S | 580 +----------------------- xen/arch/arm/arm32/mmu/Makefile | 1 + xen/arch/arm/arm32/mmu/head.S | 573 +++++++++++++++++++++++ xen/arch/arm/include/asm/arm32/macros.h | 58 ++- 4 files changed, 642 insertions(+), 570 deletions(-) create mode 100644 xen/arch/arm/arm32/mmu/head.S