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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , "Ayan Kumar Halder" Subject: [XEN v5 0/2] xen/arm: Split MMU code as the prepration of MPU work form Arm32 Date: Mon, 20 Nov 2023 14:48:57 +0000 Message-ID: <20231120144859.170965-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003448:EE_|BN9PR12MB5098:EE_ X-MS-Office365-Filtering-Correlation-Id: 3decc36a-6cc4-427b-0e0e-08dbe9d7d966 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Av5o4TIs39eAsVeqHxjMjQnm1hFAtNbCyOpqQ/BNfZeJurvFhxgFvaj6heYXU32cEs/1IOisaN8JoljD1Zm3SaocOElrazmXBr2mGxH66JTDQ8933bGE4XHlm6BPCWnBYuosEMkTnGonFk/C9Ou1iMCkdJaLPfaeerrpsscg6aZWT9elpYMIsXMJ3piM7FTkf/3x79+ueAHE4cy3KiGxG7CGjWH8aiqzkyK/uGc3bpJadk84y8/Misyd7Zf+rGEh71ztIi12eg53XMQUnJD0FVGSw6ZzPScrheNW7/5S5yYS8JYH3PNYe2+QdsUMsULt7m9Bd0Xo10srPK2a1kGwlF17VoEe84Hqz/9ff1XK2Ko0MQd/BkzDYtIjE2Xs5I+jemvucKjNAXia/9Y0QhJZgZTIoAftemivajjMq8enfdhShF+hC7rd8egAz8M8eQu5jrt1XRjnPXtOtjyWf8Czz5+ftCfoOqY4HSEYs4npOsTinvibvFfr5HQ93fwuKTJc02kwrlIeTwljXiHis8CYtTU5V5Kxcs0x8IkjrLyK2t1Ks7Z5+t8eHR7KUXthcWuteJRykTaKMCTVBbg3bFI1+h7LeqhIYsKac2ng/XGEKpebnSXVlCTAKF8IhZ37b6eifM8EGbHLGdPShRRTvLUQjEO2zRKlAIU2hRXBcLQ8kZfo2LBKSjjZakgitym0RCDJ000ZtPWx3sflgOGklNy8gT39/eH3axYqiNpPNsbpup/IzY5YVZO4gx9lMCPeVA21sRYoBPlEi1hjr+FR8NFr8Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(346002)(39860400002)(376002)(136003)(396003)(230922051799003)(82310400011)(1800799012)(186009)(64100799003)(451199024)(40470700004)(36840700001)(46966006)(40480700001)(5660300002)(4326008)(8676002)(41300700001)(8936002)(2906002)(70586007)(70206006)(316002)(6916009)(54906003)(40460700003)(47076005)(86362001)(36860700001)(478600001)(26005)(1076003)(36756003)(6666004)(2616005)(336012)(426003)(103116003)(356005)(81166007)(83380400001)(82740400003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2023 14:49:07.6860 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3decc36a-6cc4-427b-0e0e-08dbe9d7d966 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003448.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5098 Hi, These are the set of patches based on top of "[PATCH v9 0/8] xen/arm: Split MMU code as the prepration of MPU work". This is the preparation work to add MPU support on Arm32. Changes from :- v1 - Dropped "[XEN v1 1/4] xen/arm: arm32: Move pt_enforce_wxn() so that it can be bundled with other MMU functionality" and "[XEN v1 4/4] xen/arm: traps.c: Enclose VMSA specific registers within CONFIG_MMU". v2 - Changes mentioned in individual patches. v3 - Changes mentioned in individual patches. v4 - Changes mentioned in individual patches. Ayan Kumar Halder (2): xen/arm32: head: Introduce enable_{boot,secondary}_cpu_mm() xen/arm32: head Split and move MMU-specific head.S to mmu/head.S xen/arch/arm/arm32/head.S | 587 +----------------------- xen/arch/arm/arm32/mmu/Makefile | 1 + xen/arch/arm/arm32/mmu/head.S | 575 +++++++++++++++++++++++ xen/arch/arm/include/asm/arm32/macros.h | 59 ++- 4 files changed, 646 insertions(+), 576 deletions(-) create mode 100644 xen/arch/arm/arm32/mmu/head.S